1 / 11

Wireless RF Receiver Front-end System

Wireless RF Receiver Front-end System. Wei-Liang Chen. 2002-10-9. Yuan-Ze University, VLSI Systems Lab. Outline. Communications Infrastructure. Wireless RF Receiver Front-end. Building Blocks. Frequency Synthesizer. Demand in the Feature. Conclusions. References.

rusk
Download Presentation

Wireless RF Receiver Front-end System

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Wireless RF Receiver Front-end System Wei-Liang Chen 2002-10-9 Yuan-Ze University, VLSI Systems Lab.

  2. Outline • Communications Infrastructure • Wireless RF Receiver Front-end • Building Blocks • Frequency Synthesizer • Demand in the Feature • Conclusions • References

  3. Communications Infrastructure

  4. DC(0Hz) Antenna IF Mixer 5.2GHz 2.6GHz I RF Mixer LNA LO 2.6GHz Q LO 2.6GHz IF Mixer Receiver Architecture Two Downconversion ex: 5.8GHz WLAN standard LNA: Low Noise Amplifier LO : Local Oscillator

  5. Antenna LNA Building Blocks * Low Noise Amplifier Noise Source Amplified Signal Small Noisy Signal * The smaller noise contributed form LNA is better

  6. RF IF : Down-conversion RF : Up-conversion IF * Mixer is a frequency converter * LO usually is a frequency synthesizer Building Blocks (cont.) * Mixer & Local Oscillator (LO) Mixer

  7. Frequency Synthesizer • Why need frequency synthesizer? • The crystal oscillator frequency is limited • Synthesis technique provide more flexibility for application • Integration consideration

  8. * Phase Locked Loop (PLL) frequency synthesizer Phase Detector (PD): Serves as an “error amplifier” Loop filter : A low pass filter VCO : Voltage controlled oscillator * The loop is considered “locked” if is constant with time and the output frequency will be Block Diagram of Synthesizer y(t) x(t)

  9. Demand in the Feature • Multi-functions Integrated in one Chip • High Data Transmission Speed • Low Power Consumption

  10. Conclusions Power Supply

  11. References • [1] P. R. Gray, Some Considerations for Multistandard Wireless RF Modems • [2] B. Razavi, Design of Analog CMOS Integrated Circuits. Singapore: McGraw Hill, 2001. • [3] J. Craninckx and M. J. Steyaert, “A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors,” IEEE Journal of solid-state circuits, vol. 32, pp. 736-744, May. 1997. • [4] J. Bhattacharjee et al., ” A 5.8 GHz fully integrated low power low phase noise CMOS LC VCO for WLAN applications,” in Proc. IEEE Microwave Symposium Digest, 2002, pp.585-588.

More Related