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Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004. Decision Diagrams: Principles of Programming. Dragan Jankovi ć gaga@elfak.ni.ac.yu Faculty of electronic engineering University of Niš.
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Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Decision Diagrams: Principles of Programming Dragan Janković gaga@elfak.ni.ac.yu Faculty of electronic engineering University of Niš
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 OUTLINES - Introduction - Binary decision diagrams - Multiple-valued decision diagrams - Applications in Logic design - Implementation principles - Shared DDs - Unique table - Strong canonicity - Attributed edges - Computed table - Memory management and dynamic reordering - Universal DD package - Conclusion
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 “Give me enough strong support, I will move the Earth up “
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Circuit complexity • Verification of synthesized netlist vs. final netlist • Final • 2843 inputs, 4178 outputs, 150215 states • 2.634 million gates • 3861939 loc (parsed in 1:41 min) • Synthesis • 2843 inputs, 4178 outputs, 150218 states • 2.635 million gates • 222610 loc (parsed in 15 sec) • Equivalence Check: 18:10 CPU min, 0.373 GByte
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Logic design problems and the others
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 “ Decision diagrams are the state-of-the-art data structure in VLSI CAD for representation and manipulation of Discrete functions “ W H Y ?
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Binary Decision Trees. • A BDT is a rooted, directed tree that consists of two types of nodes, terminal nodes and nonterminal nodes. • Each nonterminal node v • is labeled by a variable var(v) • and has two successors : • low(v)corresponding to the case where the variable v is assigned 0 • andhigh(v)corresponding to the case wherevis assigned 1. • Each terminal node v • is labeled byvalue(v)which is either 0 or 1.
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Graphical representation index(v) = 2 1 1 low(v) non-terminal 0 2 v 3 0 high(v) 1 0 1 value(u) terminal 1 0 u
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Decision Tree Truth Table x1 1 0 x2 x2 0 1 0 1 x3 x3 x3 x3 1 0 0 1 0 1 0 1 1 0 0 0 1 0 0 1 • Node represents decision • Follow blue line for value 0 • Follow red line for value 1 • Function value determined by terminal value.
a a a Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Reduction rules 1) Merge equivalent terminals
x x x x x x y z y z y z Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 2) Merge isomorphic nodes
x y y Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 3) Eliminate Redundant Tests ROBDD or BDD
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Binary Decision Diagram • A BDD is a rooted, directed acyclic graph with two types of vertices, terminal vertices and nonterminal vertices. • Each nonterminal vertex • is labeled by a variablevar(v) • and two successors, low(v)andhigh(v) • Each terminal vertex • is labeled by a either 0 or 1.
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 STATE – OF – THE – ART DATA STRUCTURE ????
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Representing Circuit Functions • Functions • All outputs of 4-bit adder • Functions of data inputs • Shared Representation • Graph with multiple roots • 31 nodes for 4-bit adder • 571 nodes for 64-bit adder • Linear growth Truth-vector
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Logic Circuit Comparison • Do circuits realize identical function? • Basic task of formal hardware verification • Compare new design to “known good” design
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Generate Complete Representation of Circuit Function • Compact, canonical form • Functions equal if and only if representations identical • Never enumerate explicit function values • Exploit structure & regularity of circuit functions
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Generating OBDD from Network Task:Represent output functions of gate network as OBDDs. Network Evaluation • A new_var ("a"); • B new_var ("b"); • C new_var ("c"); • T1 And (A, 0, B); • T2 And (B, C); • Out Or (T1, T2); Resulting Graphs
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Verification • Combinational equivalence (UCB, Fujitsu, Synopsys, …) • FSM equivalence (Bull, UCB, MCC, Siemens, Colorado, Torino, …) • Symbolic Simulation (CMU, Utah) • Symbolic Model Checking (CMU, Bull, Motorola, … ) • Synthesis • Don’t care set representation (UCB, Fujitsu, …) • State minimization (UCB) • Sum-of-Products minimization (UCB, Synopsys, NTT) • Test • False path identification (TI)
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Finite State System Analysis • Systems Represented as Finite State Machines • Sequential circuits • Communication protocols • Synchronization programs • Analysis Tasks • State reachability • State machine comparison • Temporal logic model checking • Traditional Methods Impractical for Large Machines • Polynomial in number of states • Number of states exponential in number of state variables. • Example: single 32-bit register has 4,294,967,296 states!
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Verification (equivalence check) RTL gate compiler compare cons. synthesis net gate compiler • Pentium bug 475 million $ loss
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 How to implement Decision Diagrams ?
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Minimal memory • Efficient manipulation
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • The basic tasks in DD programming • Determine the data structure to represent a node • Provide efficient construction of DDs from a specification • Provide efficient manipulation There are a different types of DDs • “Optimal” DD does not exist – • Dependent on the underlying application one should be favored
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • DDs based packages • - standard part of many VLSI CAD systems • - efficient implementation of one or a few strongly related DD types for some particular class of discrete functions (BDD, KDD, …) • Existing packages: • Rudell’s package (Synopsys) • David Long’s package (Carnegie Mellon University) in SMV, VIS, SIS. • CUDD (University of Colorado) • PUMA (University of Freiburg) • BEMIITA, etc.
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Basic principles in DD programming • Shared DDs • Unique table • Strong canonicity • Attributed edges • Computed table • Memory management and dynamic reordering
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Node representation struct DdNode { DdHalfWord index; - index of variable assigned to the node DdHalfWord ref; - counter of references DdNode *next; - pointer to the following node in the Unique table union { CUDD_VALUE_TYPE value; - for terminal nodes DdChildren kids; - for non-terminal nodes } type } struct DdChildren{ struct DdNode *T; - pointer to the THEN successor struct DdNode *E; - pointer to the ELSE successor }
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 vector:: mapping : variables to levels and vice-versa • Shared DDs • representation of multioutput functions • system of functions • functions shared the same nodes • reduction in space
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Strong canonicity • DDs are a canonical representation • One DD corresponds to the only one function and • One function can be represented by only one DD • Conditions: • - DD is ordered and reduced • - There is no isomorphic nodes
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Unique table • all nodes are stored in table called “Unique table” • Unique table is “hash” based table • Two approaches: • - unique table • - each variable separate subtable • To do: • Choose the good “key” and hash function • Choose the right size of hash table • Influence to the number of “hits” • Depends on the application • Fine tuning of the package performance
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Decision: store the KEY into the node structure or not? • reduce storage memory • avoid repeated calculation of the node KEY • Before the generation of the new node we should try • to find the same node in the Unique table. • return existing node • generate a new node and insert it into Unique table PUMA Key = v + _HASH_KEY(G) + _HASH_KEY(H) + _HASH_KEY(I) + _HASH_KEY(J) + _HASH_KEY(K)
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Compute table • Avoid repeated calculation • All results are stored in table called “Compute table” • Compute table is “hash” based table • Two approaches: • - compute subtables for each operation separately • - unique compute table • - generic approach (only one operation) • Arguments: • - operation • - arguments of operation • - result
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 • Before calculation try to find the same operation • with the same arguments: • return the existing result • perform the operation and store result into compute table
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Attributed edges • complemented edge • EVBDD (efficient representation of multipliers) Complemented edges • denotes complemented functions • complexity for the operation negation is O(1) • dot at the edge in graph representation • the last bit in pointer to the node: • 0 – denotes noncomplemented function • 1 – denotes complemented function - Reduction in memory up to 20%
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Equivalent Pairs Limitation: Position of dots is not arbitrary x x x x x x x x
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Memory management • limited memory • garbage collection • performed: • automatically (free space less than 20%) • manually • - Reference counter used in garbage collection • There are: living nodes (ref. Count >0 ) and • dead nodes (ref count. = 0 ) • Garbage collection operation removes the dead nodes out of • the unique table
Linear Growth Exponential Growth Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Dynamic reordering - DDs are very sensitive to the variable ordering Bad Ordering Good Ordering
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Finding the good variable ordering • - very hard problem • A lot of different methods: • exact methods (exponential complexity) • heuristic methods • statistical methods • evolution algorithm based methods • dynamic variable ordering method • Sifting method • Lower-bound sifting method • Etc. - Choose one of the above methods depends on the functions, application, computer resources, etc… - apply automatically or manually
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Dynamic Variable Reordering • Richard Rudell, Synopsys • Periodically Attempt to Improve Ordering for All BDDs • Part of garbage collection • Move each variable through ordering to find its best location • Has Proved Very Successful • Time consuming but effective • Especially for sequential circuit analysis
Best Choices Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Dynamic Reordering By Sifting • Choose candidate variable • Try all positions in variable ordering • Repeatedly swap with adjacent variable • Move to best position found • • •
g h i j e f g h b b b b b b b b 1 1 1 1 2 2 2 2 i j f e b b b b 1 1 2 2 Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Swapping Adjacent Variables • Localized Effect • Add / delete / alter only nodes labeled by swapping variables • Do not change any incoming pointers
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 DDs manipulations • Building of DDs • Performing binary operation over two DDs • Performing transform over DDs
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Boolean Operations on BDDs u v <op> g f Case 1: u and v are terminals. Then resulting graph is a single terminal w: value(w) = value(u) <op> value(v)
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Case 2: u and v are non-terminals and index(u) = index(v) = i i i 0 0 1 1 <op> f1 f2 g1 g2 Get these recursively i 1 0 f2 <op> g2 f1 <op> g1
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Case 3: u is a non-terminal, index(u) = i v is either a terminal or index(v) = j > i j > i i j 0 0 1 1 <op> x or f1 f2 g1 g2 x = 0 or 1 i 1 0 APPLY( ) f2 <op> g f1 <op> g
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Pseudocode for Apply Operation functionApply( F, G ) if ( AlreadyComputed( F, G ) ) return result; else if ( F=={0,1} && G=={0,1} ) return oper( F, G ); else if ( Var( F ) == Var( G ) ) u = CreateNode( Var(F), Apply(Fx’,Gx’), Apply(Fx,Gx)); else if ( Var( F ) < Var( G ) ) u = CreateNode( Var(F) , Apply(Fx’,G ), Apply(Fx,G )); else /* if ( Var( F ) > Var( G ) ) */ u = CreateNode( Var(G) , Apply(F,Gx’ ), Apply(F,Gx )); InsertComputed( F,G,u ); return u;
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Example: F=ac+bc+d G=ac’+d F+G = ? A1 B1 a a A1,B1 A2 b A2,B2 A6 c + B5 c A6,B2 A6,B5 A3 B2 d d A3,B2 A5,B2 A3,B4 0 1 0 1 A4 A5 B3 B4 A4,B3 A5,B4
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 a A1,B1 a b A2,B2 c c A6,B2 b A6,B5 d 1 1 c A3,B2 A5,B2 A3,B4 d 0 1 A4,B3 A5,B4 reduction 0 1
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004 Improvement: APPLY procedure if-then-else operator ITE Definition: ITE is a binary operator defined by where F,G,H are arbitrary switching functions
Symposium on Innovation of Computer Science Curriculum in Higher Education Athens 2004