Analysis and Simulation of Variable Structure Systems Using Bond Graphs and Inline Integration

1. Analysis and Simulation of Variable Structure SystemsUsing Bond Graphsand Inline Integration François E. Cellier and Matthias Krebs ETH Zürich DaimlerChrysler AG

2. Outline • Motivation • Problem • Mathematical Switch Model • Diodes With Free Causality • Inline Integration • Diodes With Fixed Causality • Numerical Accuracy • Conclusions

3. Motivation • Many engineering models contain discontinuities that can be modeled by switching events. • Although switches can be represented easily in a bond graph, models containing ideal switches are notoriously difficult to simulate. • Whereas non-ideal switches resolve the conceptual difficulties of dealing with switching events, the resulting simulation results are sometimes highly inaccurate.

4. Summary • A new simulation algorithm was developed, based on inline integration, that is capable of simulating switching events reliably and accurately. • The algorithm was implemented in Dymola/Modelica, but could also be implemented easily in other bond graph modeling environments. • The paper describes the conceptual problem of dealing with ideal switching events; it explains, how the new approach circumvents these difficulties; and it demonstrates the solution by means of some simple examples.

5. A First Example • Let us start with the following very simple electronic circuit. It can be modeled and simulated easily in Dymola using the standard Modelica library. • The simulation does not cause any particular difficulties.

6. A Second Example • Let us now model and simulate a second, slightly modified, electronic circuit using the standard Modelica library. The diode is modeled as an ideal element. • This time around, the simulation dies with a division by zero. • A non-ideal diode (with a leakage resistance in its closed position and a leakage conductance in its open position) solves the problem apparently. • The default diode model in the standard Modelica library is a leaky diode.

7. Bond Graph Representation • Let us represent the two circuits by corresponding bond graphs. • On the former circuit, the causality on the diode is free, whereas it is fixed on the latter.

8. { 1, switch is open sw = 0, switch is closed Mathematical Switch Model • The switch can be modeled mathematically by the following equation: • The two possible solutions are: and • The left solution produces a division by zero in the open position, whereas the right solution produces a division by zero in the closed position.

9. Mathematical Switch Model II • We conclude that a fixed computational causality of the diode leads invariably to a division by zero in one of the two switch positions. • Hence any model that makes use of ideal switches must prevent the causality of a switching element to ever be fixed. • We still need to analyze what happens when the causality of the diode is allowed to change.

10. } Algebraic loop in three equations and three unknowns (uR1, iD, uD). Diodes With Free Causality • Let us analyze the first circuit a bit further. The circuit can be represented by seven equations:

11. Diodes With Free Causality II • We use the tearing approach for converting the algebraic loop to its causal form. To this end, we solve the switch equation for iD, while substituting uD and uR1 from the other two equations:  • This set of equations works in both switch positions. There is no division by zero.

12. Free Diodes Avoid Exception • Krebs showed in his MS thesis that: • As long as every independent switch can change its computational causality freely and independently of all other independent switches, there is no division by zero in either switch position. • The causality of a switch can be constrained by either a capacitor or an inductor, in which case we are confronted with a variable index problem. • The causality of a switch can alternatively be constrained by a source, in which case we are confronted with a non-physical condition, such as a short-circuit or a floating circuit.

13. Inline Integration • “Inlining” an integrator means appending the solver equation for that integrator to the set of model equations, thereby converting the corresponding differential equation to a difference equation. • Individual integrators can be inlined separately. • Different inlined integrators can use different integration algorithms.

14. uL = L · diL /dt iL(t) = iL(t-h) + h · diL(t) /dt  iL(t) = iL(t-h) + (h/L) · uL(t) Inlining The Inductor • Let us inline the inductor that constrains the causality of the diode in the second circuit by appending a backward Euler formula.

15. iL(t) = iL(t-h) + (h/L) · uL(t) Known, since computed in the past. This constitutes an algebraic relation betweeniandu. This now looks like a resistor. Hence the causality is now free. The Causality of Inline Integration When using the inline integration algorithm, the causalities of the so integrated storage elements are being freed up. Consequently, the division by zero problem disappears.

16. Algebraic loop in four equations and four unknowns (uL, iD, diD, uD). Diodes With Fixed Causality • Let us analyze the second circuit a bit further. The circuit can be represented by eight equations:

17. Diodes With Fixed Causality II • Let us solve the algebraic loop by tearing: • As in the previous example, this set of equations works in both switch positions. There is no division by zero. 

18. Implementation in Dymola

19. Numerical Accuracy • Let us compare the inlined inductor approach with the leaky diode approach: • The leaky diode uses a leakage resistance of 10-5Ω, and a leakage conductance of 10-5 mho.

20. Inlined inductor leaky diode Numerical Accuracy II • Although the leakage resistance and leakage conductance values are very small, the results of the two simulations are quite different. • The discrepancy disappears when the leakage resistance is reduced to 10-10Ω, and when the leakage conductance is reduced to 10-10 mho. • Using fudge values in models is often dangerous, as the user is not aware of their influence, and often not even of their existence.

21. Conclusions • It has been shown that inline integration can be used to resolve the division-by-zero problem occurring in the simulation of causality-constrained switches. • The use of inline integration avoids the introduction of fudge parameters that may falsify the simulation results. • Inline integration can be applied to each integrator individually, i.e., there is no need to inline all integrators, only those that constrain switch equations. • The bond graph technique enables the modeler to analyze the causality constraints easily and quickly, thereby providing him or her with guidance as to which integrators need to be inlined.

22. Conclusions II • The new version of BondLib, Dymola’s bond graph library, contains inlined inductor and capacitor models. • Inlining has to be done manually at the current time, although it would principally be possible to implement an algorithm that finds automatically the integrators that need to be inlined. • The current implementation of inlined integrators works with a fixed step size, i.e., doesn’t tie into Dymola’s step-size control algorithm. • This is a pity, as another fudge parameter is being introduced in this fashion, namely the fixed step size, h. • Yet, this is not a conceptual problem, only an issue with the current implementation.

23. The End Any Questions?