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ECT 464

ECT 464. Lecture 24 Siemens Instructions 3. Today’s Quote: The secret of contentment is the realization that life is a gift not a right. But godliness with contentment is great gain. But godliness with contentment is great gain. 1 Timothy 6:6,7. Counter Instructions.

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ECT 464

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  1. ECT 464 Lecture 24 Siemens Instructions 3

  2. Today’s Quote: The secret of contentment is the realization that life is a gift not a right. But godliness with contentment is great gain. But godliness with contentment is great gain. 1 Timothy 6:6,7

  3. Counter Instructions The Count Up instruction (CTU) counts up from the current value each time the count up (CU) input makes the transition from off to on. When the current value Cxx is greater than or equal to the preset value PV, the counter bit Cxx turns on. The counter is reset when the Reset (R) input turns on, or when the Reset instruction is executed. The counter stops counting when it reaches the maximum value (32,767). The Count Down instruction (CTD) counts down from the current value of that counter each time the count down (CD) input makes the transition from off to on. When the current value Cxx is equal to 0, the counter bit Cxx turns on. The counter resets the counter bit Cxx and loads the current value with the preset value PV when the load input LD turns on. The counter stops upon reaching zero, and the counter bit Cxx turns on.

  4. Counter Instructions

  5. Count Up/Down The Count Up/Down instruction (CTUD) counts up each time the count up (CU) input makes the transition from off to on, and counts down each time the count down (CD) input makes the transition from off to on. The current value Cxx of the counter maintains the current count. The preset value PV is compared to the current value each time the counter instruction is executed. Upon reaching maximum value (32,767), the next rising edge at the count up input causes the current count to wrap around to the minimum value (--32,768). On reaching the minimum value (--32,768), the next rising edge at the count down input causes the current count to wrap around to the maximum value (32,767). When the current value Cxx is greater than or equal to the preset value PV, the counter bit Cxx turns on. Otherwise, the counter bit turns off. The counter is reset when the Reset (R) input turns on, or when the Reset instruction is executed. The CTUD counter stops counting when it reaches PV.

  6. Counter Example 1

  7. Counter Example 2

  8. IEC Counter Instructions

  9. IEC Counter Instructions Up Counter The Count Up instruction (CTU) counts up from the current value to the preset value (PV) on the rising edges of the Count Up (CU) input. When the current value (CV) is greater than or equal to the preset value, the counter output bit (Q) turns on. The counter resets when the reset input (R) is enabled. The Up Counter stops counting when it reaches the preset value. Down Counter The Count Down instruction (CTD) counts down from the preset value (PV) on the rising edges of the Count Down (CD) input. When the current value (CV) is equal to zero, the counter output bit (Q) turns on. The counter resets and loads the current value with the preset value when the load input (LD) is enabled. The Down Counter stops counting when it reaches zero.

  10. IEC Counter Instructions Up/Down Counter The Count Up/Down instruction (CTUD) counts up or down from the current value (CV) on the rising edges of the Count Up (CU) or Count Down (CD) input. When the current value is equal to preset, the up output (QU) turns on. When the current value is equal to zero, the down output (QD) turns on. The counter loads the current value with the preset value (PV) when the load (LD) input is enabled. Similarly, the counter resets and loads the current value with 0 when the reset (R) is enabled. The counter stops counting when it reaches preset or 0.

  11. IEC Counter Example

  12. High Speed Counter The High-Speed Counter Definition instruction (HDEF) selects the operating mode of a specific high-speed counter (HSCx). The mode selection defines the clock, direction, start, and reset functions of the high-speed counter. You use one High-Speed Counter Definition instruction for each high-speed counter.

  13. High Speed Counter The High-Speed Counter (HSC) instruction configures and controls the high-speed counter, based on the state of the HSC special memory bits. The parameter N specifies the high-speed counter number. The high-speed counters can be configured for up to twelve different modes of operation. Each counter has dedicated inputs for clocks, direction control, reset, and start, where these functions are supported. For the two-phase counters, both clocks can run at their maximum rates. In quadrature modes, you can select one times (1x) or four times (4x) the maximum counting rates. All counters run at maximum rates without interfering with one another.

  14. High Speed Counter

  15. High Speed Counter Example

  16. High Speed Counter Controls

  17. Pulse Outputs The Pulse Output instruction (PLS) is used to control the Pulse Train Output (PTO) and Pulse Width Modulation (PWM) functions available on the high-speed outputs (Q0.0 and Q0.1).

  18. Pulse Train Outputs PTO provides a square wave (50% duty cycle) output for a specified number of pulses and a specified cycle time. PTO can produce either a single train of pulses or multiple trains of pulses (using a pulse profile). You specify the number of pulses and the cycle time (in either microsecond or millisecond increments): - Number of pulses: 1 to 4,294,967,295 - Cycle time: 10 μs to 65,535 μs or 2 ms to 65,535 ms. Specifying an odd number of microseconds or milliseconds for the cycle time (such as 75 ms), causes some distortion in the duty cycle.

  19. Pulse Train Outputs PTO provides a square wave (50% duty cycle) output for a specified number of pulses and a specified cycle time. PTO can produce either a single train of pulses or multiple trains of pulses (using a pulse profile). You specify the number of pulses and the cycle time (in either microsecond or millisecond increments): - Number of pulses: 1 to 4,294,967,295 - Cycle time: 10 μs to 65,535 μs or 2 ms to 65,535 ms. Specifying an odd number of microseconds or milliseconds for the cycle time (such as 75 ms), causes some distortion in the duty cycle.

  20. Pulse Width Outputs • PWM provides a fixed cycle time output with a variable duty cycle. You can specify the cycle time and the pulse width in either microsecond or millisecond increments: • Cycle time: 10 μs to 65,535 μs or 2 ms to 65,535 ms • Pulse width time: 0 μs to 65,535 μs or 0 ms to 65,535 ms

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