Chapter 7 Microsequencer Control Unit Design

1. Chapter 7 Microsequencer Control Unit Design

2. 7.1 Basic Microsequencer Design • Microsequencer • It stores its control signals in a lookup ROM, microcode memory. • The lookup ROM asserts the control signals in the proper sequence to realize the instructions. • Microsequencer operations • Microinstruction: consists of several bit fields, which are micro-operation field and next address field.

3. Figure 7.1 Generic microsequencer organization

4. Microinstruction formats • Figure 7.2 • Select field: To determine the source of the address of the microinstruction • ADDR field: To specify an absolute address for performing an absolute jump by the microsequencer. • Micro-operations field: To generate control signals • Horizontal microcode • Vertical microcode

5. Figure 7.2

6. Horizontal microcode and Vertical microcode • Horizontal microcode • One bit in the micro-operations field of the microinstruction is assigned to each micro-operation. • This can result in large microinstruction. • Vertical microcode • The micro-operations are grouped into fields. • Vertical microinstructions require fewer bits than their equivalent horizontal microinstructions. • The microsequencer must incorporate a decoder for each micro-operation signals.

7. 7.2 Design and implementation of a very simple microsequencer • Layout: Figure 7.3

8. Figure 7.3

9. Mapping logic • The microsequencer will use the same mapping function(Refer to Figure 6.9. • 1 IR[1..0] 0 • This will produce addresses of 1000, 1010,1100,1110 for ADD1, AND1, JUMP1, and INC1, respectively. • Figure 7.4 , Table 7.1, Table 7.2

10. Figure 7.4

11. Generating the micro-operations using horizontal microcode • A microsequencer has two tasks • To generate the correct micro-operations • To follow the correct sequence of the states. • The micro-operations and their mnemonics are shown in Table 7.3. • The complete list of control signals is given in Table 7.6.

12. Generating the micro-operations using vertical microcode • Figure 7.5

13. Figure 7.5

14. Guidelines for grouping • Whenever two micro-operations occur during the same state, assign them to different fields. • Include a NOP in each field if necessary(Table 7.7). • Distribute the remaining micro-operations to make best use of the micro-operation field bits. • Group together micro-operations that modify the same registers in the same fields. • Table 7.8, Figure 7.6

15. Figure 7.6

16. Nonoinstructions • Figure 7.A • It encodes all micro-operations in a single field. • The microcode memory outputs a value that points to a location in nano-memory.

17. Figure 7A

18. 7.3 Design and implementation of a Relatively simple microsequencer • Refer to Figure 6.12 • Two state, JNPZ1 and JMPZ1 are created for the states -JMPZY1, JMPZN1, JPNZY1, JPNZN1(Figure 7.7)

19. Figure 7.7

20. Basic layout for the microsequencer • Figure 7.8 • The box “+1” is a hardware incrementer. • Since the state diagram has 39 states, microsequencer needs a 6-bit address. • Mapping function: IR[3..0]00. • Table 7.11

21. SEL signal • Unconditional jump and conditional jump (Refer to Table 7.12) • BT: Branch logic (Table 7.14)

22. Figure 7.8

23. 7.4 Reducing the number of microinstructions • Microsubroutine • Figure 7.9 & 7.10

24. Figure 7.9

25. Figure 7.10

26. Reducing the number of microinstructions(continued) • Microcode jumps • Figure 7.11

27. Figure 7.11

28. 7.5 Microprogrammed control vs. Hardwired control • Complexity of the instruction sets • Ease of modification • Clock speed

29. 7.6 Pentium Microprocessor • Figure 7.12

30. Figure 7.12