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Computer Architecture. Part IV-B: I/O Buses. Chipsets. Intelligent bus controller chips found on the motherboard Enable higher speeds on one or more buses and the utilization of new facilities (e.g. faster, larger RAM) Suppliers include Intel, SIS, Opti, Via, ALi. CPU. Caches.
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Computer Architecture Part IV-B: I/O Buses
Chipsets • Intelligent bus controller chips found on the motherboard • Enable higher speeds on one or more buses and the utilization of new facilities (e.g. faster, larger RAM) • Suppliers include Intel, SIS, Opti, Via, ALi
CPU Caches System Bus / FSB Adapter Memory Peripheral Bus Controllers Disks Displays Keyboards I/O Devices: Networks Chipsets and the Other Components
Internal Bus Organization • Same bus for all (e.g. HP-PB) • Separate bus for CPU-memory and I/O (whether I/O to CPU or I/O to memory, e.g. CIO)
I/O Bus Architecture • Four (4) main I/O bus architectures in the modern PC • Industry Standard Architecture (ISA) • Peripheral Component Interconnect (PCI) • Accelerated Graphics Port (AGP) • Universal Serial Bus (USB) • Each may have internal or external ports • May be used to connect other I/O buses
Internal vs. External Ports • Internal I/O ports • LPT, COM1, COM2, EIDE, etc. • External ports • Includes expansions slots in motherboard which can accept various types of controllers
I/O Buses in the PC Source: www.mkdata.dk
Devices on each I/O Bus Source: www.mkdata.dk
ISA • 16-bits wide, 8 MHz • Works synchronously with the CPU clock • If the system bus is faster than 10 MHz then the ISA bus frequency is reduced to a fraction of the system bus frequency • Theoretical maximum: 8 Mbps, Reality: Only 1 – 2 Mbps
ISA Internal and External Ports Source: www.mkdata.dk
ISA Drawbacks • 16-bits, 8 MHz • Too narrow and slow, not enough bandwidth • No intelligence • Every component requires a specific IRQ and possibly a DMA channel • Tuning of IRQ and DMA needs to be done manually – limited or no Plug-and-Play (PnP) features
ISA Future • Obsolete! • No longer used in current motherboards • Intel’s 810 chipset was the first not to include any support for ISA
PCI • Started 32-bits wide, 33 MHz, maximum data transfer rate of 132 Mbps -> PCI-X supports 64-bits, 66 MHz • Processor independent • Can be used with any 32- or 64-bit CPU • Buffered architecture
Buffered Architecture • CPU delivers data to the buffer and proceeds with other tasks; PCI bus handles the rest of the operation • PCI adapters transmits data to the buffer, regardless of whether the CPU is free to handle request, i.e. requests are placed in a queue • Plug-and-play is supported in PCI specifications
PCI Internal and External Ports Source: www.mkdata.dk
PCI Future • PCI-X • Supported by IBM, 3Com, Mylex, Adaptec, HP and Compaq • PCI-X 1.0: 64-bits, 66/133 MHz (133 provides around 11 MB/s bandwidth) • PCI-X 2.0: 64-bits, 266/533 MHz • PCI-X 1066: 1066 MHz (available 2004), 8.5 GB/s bandwidth
PCI Future • PCI Express (Next Generation I/O or NGIO) • Supported by Intel, Dell, NEC, Sun, etc. • Codenamed 3GIO • Can provide a theoretical maximum of 16 GB/s bandwidth
AGP • Designed exclusively for video • Relieves PCI bus of graphics data • 66 MHz, 64-bits • Introduced by Intel on Pentium II boards (440LX and later). • AGP standards • 1x – 266 Mbps • 2x – 533 Mbps • 4x – 1.07 Gbps • 8x – 2.1 Gbps
ISA PCI AGP ISA, PCI and AGP slots
USB • 12 megabits per second (Mbps) bus • Can connect up to 127 devices in one long “daisy chain” • Devices can be plugged and unplugged easily USB
USB Devices • Meant to connect devices such as the keyboard, mouse, joystick, speakers, printers, modems, scanners, camera, etc. Source: www.mkdata.dk
USB Versions • USB v1.1 (USB) • Data rates of 12 Mbps (full-speed) and 1.5 Mbps (low-speed) • USB v2.0 (Hi-Speed USB) • Theoretical maximum data transfer rate of 480 Mbps • Supports the three data transfer rates for backward compatibility
Enhanced IDE (EIDE) • IDE – Intelligent/Integrated Drive Electronics • Also known as Advanced Technology Attachment (ATA) • Each channel has a master and slave device Source: www.mkdata.dk
EIDE Devices • Hard disks (ATA-33/66/100) • CD-R, CD-RW drives • DVD drives • Zip drive • Tape Backup units
SCSI • Small Computer System Interface • Utilizes host adapter to control 7 (or 15) devices using only one IRQ • SCSI has its own CPU system frees the main CPU from the I/O workload
The SCSI Host Adapter • Intelligent controller at the heart of a SCSI system • Controls several SCSI units including various types of drives (hard disks, CDROM, Zip disks, MO drives, etc.), backup tape units, scanners • Has its own BIOS • Some motherboards feature an on-board SCSI host adapter
SCSI Chain • Regular SCSI systems can handle 8 devices (including the adapter); wide SCSI can handle 15 devices • Each device has to be assigned a unique number from ID0 to ID7; host adapter is typically assigned ID7 • SCSI devices can be internal (inside the computer casing) or external
The devices at both ends of a SCSI chain must be terminated. The host adapter is one end of the chain. SCSI Terminators Source: www.mkdata.dk
SCSI Intelligence • SCSI utilizes its own protocol to assure maximum utilization of the bandwidth. • Basis of SCSI is a set of commands • Each device has its own intelligent controller which can interpret these commands. Source: www.mkdata.dk
SCSI Standards • There are various other variations of SCSI • SCSI standards are confusing to say the least!