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Lecture#13

Lecture#13. M. Mateen Yaqoob The University of Lahore Spring 2014. Instruction Formats. • The most common fields in instruction formats are: Mode field : Specifies the way the effective address is determined Operation code : Specifies the operations to be performed.

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Lecture#13

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  1. Lecture#13 M. Mateen Yaqoob The University of Lahore Spring 2014

  2. Instruction Formats • • The most common fields in instruction formats are: • Mode field: Specifies the way the effective address is determined • Operation code: Specifies the operations to be performed. • Address field: Designates a memory address or a processor register Mode Opcode Address

  3. Instruction Formats • Zero address instruction: Stack is used. Arithmetic operation pops two operands from the stack and pushes the result. • One address instructions: AC and memory. Since the accumulator always provides one operand, only one memory address needs to be specified. •Two address instructions: Two address registers or two memory locations are specified, one for the final result. •Three address instructions: Three address registers or memory locations are specified, one for the final result. It is also called general address organization.

  4. Zero address instructions Instruction: ADD Push and pop operations need to specify one address involved in data transfer. Stack-organized computer does not use an address field for the instructions ADD, and MUL Instruction: POP XEvaluate X = ( A + B ) * ( C + D ) PUSH, and POP instructions need an address field to specify the operand

  5. Zero address instructions PUSH A PUSH B ADD PUSH C PUSH D ADD MUL POP X Advantages: No memory addresses needed during the operation.Disadvantages: results in longer program codes.

  6. One address instructions • One address can be a register name or memory address. • SINGLE ACCUMULATOR ORGANIZATION • Since the accumulator always provides one operands, only one memory address needs to be specified.Instruction: ADD XMicrooperation: AC ¬ AC + M[X]

  7. One address instructions LOAD A ADD B STORE T All operations are done between the AC register and memory operand Advantages: fewer bits are needed to specify the address.Disadvantages: results in writing long programs.

  8. Two address instructions • • Assumes that the destination address is the same as that of the first operand. Can be a memory address or a register name. • Instruction: ADD R1, R2Microoperation: R1  R1 + R2

  9. Two address instructions MOV R1, A MOV R2, B ADD R1, R2 MOV X, R1 • most common in commercial computers • Each address fields specify either a processor register or a memory operand Advantages: results in writing medium size programsDisadvantages: more bits are needed to specify two addresses.

  10. Three address organization • GENERAL REGISTER ORGANIZATION • Three address instructions: Memory addresses for the two operands and one destination need to be specified.Instruction: ADD R1, R2, R3Microoperation: R1  R2 + R3 • Advantages: results in writing short programsDisadvantages: more bits are needed to specify three addresses. ADD R1, R2, R3

  11. EXAMPLE: Show how can the following operation be performed using:a- three address instructionb- two address instructionc- one address instructiond- zero address instructionX = (A + B) * (C + D)

  12. a-Three-address instructions (general register organization) ADD R1, A, B R1  M[A] + M[B] ADD R2, C, D R2  M[C] + M[D] MUL X, R1, R2 M[X]  R1 * R2

  13. b-Two-address instructions (general register organization) MOV R1, A R1  M[A] ADD R1, B R1  R1 + M[B] MOV R2, C R2  M[C] ADD R2, D R2  R2 + M[D] MOV X, R2 M[X] R2 MUL X, R1 M[X]  R1 * M[X]

  14. c- One-address instructions LOAD A AC M[A] ADD B AC  AC + M[B] STORE T M[T ] AC LOAD C AC  M[C] ADD D AC  AC + M[D] MUL T AC  AC * M[T ] STORE X M[X]  AC Store

  15. d- Zero-address instructions (stack organization) Push value Else If operator is encountered: Pop, pop, operation, push Pop operand pop another operand then perform an operation and push the result back into the stack. PUSH A TOS  A Push PUSH B TOS  B ADD TOS  (A+B) PUSH C TOS  C PUSH D TOS  D ADD TOS  (C+D) MUL TOS  (C+D)*(A+B) POP X M[X]  TOS (*TOS stands for top of stack). Pop, pop, operation, push

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