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Access buffer - PowerPoint PPT Presentation

Reducing Leakage Power in Peripheral Circuits of L2 Caches

Reducing Leakage Power in Peripheral Circuits of L2 Caches. Houman Homayoun and Alex Veidenbaum Dept. of Computer Science, UC Irvine {hhomayou, alexv}@ics.uci.edu ICCD 2007. L2 Caches and Power . L2 caches in high-performance processors are large 2 to 4 MB is common

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Access buffer - PowerPoint PPT Presentation

Reducing Leakage Power in Peripheral Circuits of L2 Caches