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INFN WP3 CMOS ASICs for 3D

INFN WP3 CMOS ASICs for 3D. Valerio Re - INFN. WP3 AIDA meeting, CERN, February 16, 2011. Access to full CMOS wafers WP3 participants. From WP3 description : (AGH-UST, CERN, CEA, CNRS-CPPM, CNRS-LAL, CNRS-IPHC, INFN-Pavia , INFN-Pisa and INFN-Milano; lead: INFN)

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INFN WP3 CMOS ASICs for 3D