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Timing Bug in CSC Digis

Timing Bug in CSC Digis. Affected both wire and comparator digis Made BX resolution too good Bug was in expressions like int bx = static_cast<int>( correctedTime / theBunchSpacing ) So everything from t=-24.999 ns to t=+24.999 ns went into BX = 0 Probably existed since ORCA days

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Timing Bug in CSC Digis