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Performance and Power Optimization through Data Compression in Network-on-Chip Architectures

Performance and Power Optimization through Data Compression in Network-on-Chip Architectures. Reetuparna Das , Asit K Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan , Ravi Iyer * , Mazin S. Yousif * , Chita R. Das. *. Why On-Chip Networks ?.

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Performance and Power Optimization through Data Compression in Network-on-Chip Architectures