1 / 12

Circuitos Digitales II y Lab . Arquitectura de Punto Flotante

Departamento de Ingeniería Electrónica Facultad de Ingeniería. Circuitos Digitales II y Lab . Arquitectura de Punto Flotante. Semana No.14 Semestre 2011-2 Prof. Eugenio Duque Pérez eaduque@udea.edu.co Prof. Gustavo Patiño Álvarez (en comisión) gpatino@udea.edu.co.

senta
Download Presentation

Circuitos Digitales II y Lab . Arquitectura de Punto Flotante

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Departamento de Ingeniería Electrónica Facultad de Ingeniería Circuitos Digitales II y Lab.Arquitectura de Punto Flotante Semana No.14 Semestre 2011-2 Prof. Eugenio Duque Pérez eaduque@udea.edu.co Prof. Gustavo Patiño Álvarez (en comisión) gpatino@udea.edu.co

  2. Decimal Floating Point addition • Align the decimal point of the number that has the smaller exponent. • Add the decimal numbers. The exponent is common. • The result must be normalized. Scientific notation. • Round the result taking in consideration the spaces for decimal digits. The binary floating point addition, has a similar behavior. Show examples.

  3. Decimal Floating Point multiplication. • Add of exponents. • Multiply the bases. • Normalize the result. • Round the result taking in account the spaces for decimal digits. Binary floating multiplication has similar behavior but is necessary to correct the double add of bias Example. Decimal and binary

  4. Bibliography Computer Organization and Design. The Hardware /Software Interface. David Patterson and John Hennessy. Pp. 275-300 IEEE 754 Estándar Floating-Point. mth Exercises • Parcial_2_09-01.pdf

More Related