Decoupling Capacitance Allocation for Power Supply Noise Suppression

1. Decoupling Capacitance Allocation for Power Supply Noise Suppression Shiyou Zhao, Kaushik Roy, Cheng-Kok Koh School of Electrical & Computer Engineering Purdue University Supported in part by SRC, Intel, NSF

2. Outline • Motivation • Power Supply Noise Estimation • Decoupling Capacitance (decap) Budget • Allocation of Decoupling Capacitance • Experiment Results • Conclusion

3. Motivation • Power supply noise is a serious issue in DSM design • Noise is getting worse as technology scales • Noise margin decreases as supply voltage scales • Power supply noise may slow down circuit performance • Power supply noise may cause logic failures • Decoupling capacitance is an effective way to alleviate power supply noise • Decap buffers switching activities by supplying part of the current demand • Peak noise can be reduced

4. Problem Formulation • Given a floorplan with switching activities information available for each module: • Determine how much decap is required by each module to keep the supply noise below a specified upper limit • Allocate white-space to each module to meet its decap budget • Related issue • Determine worst case power supply noise for each module in the floorplan • Allocate the existing white space in the floorplan

5. Power Supply Network—RLC Mesh VDD :Current Source Rp Lp : VDD pin VDD VDD VDD

6. Current Distribution in Power Supply MeshIllustration Current contribution Current flowing path :Connection point, VDD (1) (3) :VDD pin (5) VDD (2) (6) C B Module A

7. Current Distribution in Power Supply Network • Distribute switching current for each module in the power supply mesh • Observation: Currents tend to flow along the least-impedance paths • Approximation: Consider only those paths with minimal impedance --shortest, second shortest, …

8. i i 1(t) 3(t) R1 L1 C2 2(t) Current Flowing Paths and Power Supply Noise Calculation • Power supply noise at a target module is the voltage difference between the VDD pin and the module • Apply KVL: VDD R2 L2 k C1 i

9. Decoupling Capacitance Budget • Decap budget for each module can be determined based on its noise level • Initial budget can be estimated as follows: • Iterations are performed if necessary until noise at each module in the floorplan is kept under certain limit

10. Allocation of Decoupling Capacitance • Decap needs to be placed in the vicinity of each target module • Decap requires WS to manufacture on • Use MOS capacitors • Decap allocation is reduced to WS allocation • Two-phase approach: • Allocate the existing WS in the floorplan • Insert additional WS into the floorplan if required

11. Allocation of Existing White Space WS A B D w2 C w1 E w3

12. Objective: Maximize the utilization of available WS Existing WS can be allocated to neighboring modules using LP Notation: LP Approach: Allocation of Existing WS--Linear Programming (LP) Approach

13. Insert Additional WS into Floorplan If Necessary • Update decap budget for each module after existing WS has been allocated • If additional WS if required, insert WS into floorplan by extending it horizontally and vertically • Two-phase procedure: • insert WS band between rows based the decap budgets of the modules in the row • insert WS band between columns based on the decap budgets of the modules in the column

14. Moving Modules to Insert WS

15. Experimental ResultsComparison of Decap Budgets(Ours vs “Greedy Solution”)

16. Experimental Results for MCNC Benchmark Circuits

17. Floorplan of playout Before/After WS Insertion

18. Conclusion • A methodology for decoupling capacitance allocation at floorplan level is proposed • Linear programming technique is used to allocate existing WS to maximize its utilization • A heuristic is proposed for additional WS insertion • Compared with “Greedy” solution, our method produces significantly smaller decap budgets

19. Thank you