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INSIDE – Update meeting

This update provides information on the objectives of the PET DAQ system, including sustaining annihilation and prompt photon rates during beam irradiation. It also discusses the development progress of the motherboard hardware, firmware, and software, as well as the RX board development.

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INSIDE – Update meeting

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  1. INSIDE – Update meeting PET DAQ 24 March 2014

  2. Refresh from the last meetings • Objectives of the PET DAQ • Provide a full in-beam (full-beam) PET systemable to sustainannihilation and promptphotonratesduring the beamirradiation • Instant single rates in the microsecondrange are currentlyunknown • As a first guesswe take 30 kHZ/cm2 as the desired maximum sustainablesingle rate (∼ 6× with respect to DoPET) • Provide a dedicated PET scanner with a coincidencewindow (CW) of 500 ps

  3. Data acquisition flow • EachSiPM/ASIC pair can handle single ratesat 180 kHZ • The 5 cm x 5 cm modulewillacquireat 720 kHZ • Data collected by twoFPGAs • TX, coupled to the ASIC • RX, plugged on the mainboard • Data packetis 10 B • The expectedmodule output bandwidthis 7.2 MB/s

  4. Updates

  5. Motherboard HW development • Functional design ✔ • Schematic design ✔ • Mechanical design ✔ • PCB design (in progress) • Construction and assembly✖ • Initial delivery 12/2013, expected delivery 4/2013

  6. Motherboard FW development • Functionalarchitecture design ✔ • USB interface (imported from DoPET) • RX interface (under development) • Coincidencesorter and processor ✖ • Expected first version delivery 12/2014 (depending on HW status)

  7. Motherboard SW development • Largelyimported from DoPET • Server/client architecture, suitable for multi-modalintegration (sameas for IrisPET) • No specificdevelopments are being made at the moment

  8. RX boarddevelopment • Initial FW development with the SoCKitboard • Cyclone V SX 5CSXFC6D6 FPGA • Equipped with ARM processor

  9. RX boarddevelopment • Customizing and producing a new boardbased on the sametechnology • The HSMC connectoriskept to communicate with the TX board + Motherboard connector

  10. RX FW boarddevelopment • The RX FW architectureisrelativelysimple • SPI slave component • FIFO buffers • SERDES

  11. RX SW boarddevelopment • The RX doesnotrequire SW development • However, the ARM processors offersimple and flexiblesolutions to processing problems • Thisis a new aspect of SoC FPGA thatis under investigation

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