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EEL 3705 / 3705L Digital Logic Design

EEL 3705 / 3705L Digital Logic Design. Fall 2006 Instructor: Dr. Michael Frank Lecture Module #2: Elements of Combinational Logic. Topics for Today (Wed. 1/10). Administrivia: HW#1 will be posted shortly. Homeworks are generally due 1 week after they are assigned.

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EEL 3705 / 3705L Digital Logic Design

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  1. EEL 3705 / 3705LDigital Logic Design Fall 2006Instructor: Dr. Michael Frank Lecture Module #2: Elements of Combinational Logic M. Frank, EEL3705 Digital Logic, Spring 2007

  2. Topics for Today (Wed. 1/10) • Administrivia: • HW#1 will be posted shortly. • Homeworks are generally due 1 week after they are assigned. • Lab Assignment #1 will be posted shortly. • In next week’s labs, turn in lab report #0 & pre-lab report #1. • Today’s Lecture: • Topic #2, Combinational Digital Logic • Subtopic 2.1, Elements of combinational logic M. Frank, EEL3705 Digital Logic, Spring 2007

  3. Overview • Topic 2. Combinational Digital Logic • Subtopic 2.1. Elements of combinational logic • 2.1.1. Basic logic operators – NOT, AND, OR, XOR. • 2.1.2. Logic gates and combinational logic networks • 2.1.3. Inverting gates: NAND, NOR, XNOR and NOT bubbles. • 2.1.4. Multi-input gates, bus lines, bussed and bit-parallel inputs. • 2.1.5. Standard implementions of basic gates in static CMOS technology M. Frank, EEL3705 Digital Logic, Spring 2007

  4. Boolean Logic: Review • For reasoning about whether propositions (statements) are true (T) or false (F). • The truth value of the proposition. • The important functional operators of Boolean logic include: • NOT(x) = {T iff x=F (otherwise F)} • AND(x,y) = {T iff both x=T and y=T} • OR(x,y) = {T iff either x=T or y=T, or both} • XOR(x,y) = {T iff either x=T or y=T, but not both} George Boole1815-1864 iff = “ifand only if”  “exclusive OR” M. Frank, EEL3705 Digital Logic, Spring 2007

  5. Boolean Logic Notations • You should be aware that any given expression of Boolean logic could be written in several styles: • Writing operators as named functions with arguments: • XOR(OR(AND(a,b),NOT(c)),d) • Writing operator names “infix” (between their operands): • ((a AND b) OR (NOT c)) XOR d • Using mathematical logic operator symbols: • [(a b)  ¬c]  d • Using C/C++-style programming language operators: • ((a & b) | ~c) ^ d • Using Boolean algebra notation: These are applied to all of the bits of a word in parallel We’ll use this notation M. Frank, EEL3705 Digital Logic, Spring 2007

  6. Table of Popular Boolean Operators M. Frank, EEL3705 Digital Logic, Spring 2007

  7. Logic Gate Icons • Inverter • Logical NOT,Boolean complement • AND gate • Boolean product • OR gate • Boolean sum • XOR gate • exclusive-OR, sum mod 2 x x x·y y x+y x y x xy y M. Frank, EEL3705 Digital Logic, Spring 2007

  8. Multi-input AND, OR • Can extend these gates to arbitrarilymany inputs. • Two commonlyseen drawing styles: • Note that the second style keeps the gate icon relatively small. x1 x1x2x3 x2 x3 x1⋮ x5 x1…x5 M. Frank, EEL3705 Digital Logic, Spring 2007

  9. Multi-input XOR • There is a small subtlety with this one… • You might expect that XOR(a,b,c) should mean, “a or b or c, but not all three.” • But actually, that’s not how it’s usually defined. • Or, how about, “a or b or c, but not more than one?” • No, it’s not that either! a • XOR(a,b,c) is defined as • (a⊕b)⊕c= (a+b+c) mod 2. • “An odd number of a, b,and c are true.” b a⊕b⊕c c M. Frank, EEL3705 Digital Logic, Spring 2007

  10. NAND, NOR, XNOR • Just like the earlier icons,but with a small circle onthe gate’s output. • Denotes that the output is complemented. • Circles could also be placed on gate inputs. • Means, input is complementedbefore being used. x y x y x y M. Frank, EEL3705 Digital Logic, Spring 2007

  11. CMOS NAND gate implementation • A NAND gate is particularly easyto implement in CMOS: • Simple 4-transistor circuit  • A NOR gate is equally simple, • but a little bit slower, • due to use of series pFETs; • holes have lower mobility than e−’s • NAND is a universal gate: • If we wanted to, we could buildany computer using nothingbut NAND gates and wires! Vdd x y xy Vss = GND M. Frank, EEL3705 Digital Logic, Spring 2007

  12. Bubbled Inputs and DeMorgan Substitutions • We’re also allowed to draw inversion bubbles on the inputs to a gate. • Example: The below gate computes : • Note that DeMorgan’s Law allows us to swap AND↔OR by toggling bubbles on inputs & outputs • E.g., the above gate equals  • I.e., an AND of active-low signals implements OR. x y x+y x y M. Frank, EEL3705 Digital Logic, Spring 2007

  13. Active-Low Logic • Sometimes, a given logic signal will mean the opposite of what you might expect: • Example: A typical signal for controlling an LED: • 0 = “turn on the LED” • 1 = “turn off the LED” • When this is the case, it is sometimes called active-low or inverse logic. • We may use inverted names for the signals. Vcc 1kΩ ~led “Active-low OR” (not AND!) gate M. Frank, EEL3705 Digital Logic, Spring 2007

  14. Buffer x x • What about an invertersymbol without a circle? • This is called a buffer. • It computes the identity function. • It serves no logical purpose, but… • It represents an explicit delay in the circuit. • This is sometimes useful for timing purposes. • All gates, when physically implemented, incur a non-zero delay between when their inputs are seen and when their outputs are ready. • Often called the propagation delay. M. Frank, EEL3705 Digital Logic, Spring 2007

  15. Topic 3.4: Basic Combinational Logic Examples of Some Basic Circuits M. Frank, EEL3705 Digital Logic, Spring 2007

  16. Combinational Logic Circuits • Basic Combinational Logic Concepts • Examples of Some Simple Combinational Circuits: • 3-input majority function • XOR constructions • half adder • full adder • n-bit ripple-carry adder M. Frank, EEL3705 Digital Logic, Spring 2007

  17. Combinational Logic Circuits • Note: The correct word to use here is “combinational,” NOT “combinatorial!” • “Combinatorial” refers to various techniques for counting the number of elements in large sets. • Combinational circuits are circuits composed of Boolean gates whose outputs depend only on their most recent inputs, not on earlier inputs. • Thus these circuits have no useful memory. • Their state persists while the inputs are constant, but is irreversibly lost when the input signals change. • Later we’ll discuss sequential circuits that have memory. M. Frank, EEL3705 Digital Logic, Spring 2007

  18. Majority Voting Circuit • 3-input majority voter: • Output is true if 2 or more inputs are. • Truth table shown at right. • Boolean expression: m = ab + ac + bc • Logic circuit: M. Frank, EEL3705 Digital Logic, Spring 2007

  19. XOR from AND/OR/NOT • Boolean algebra expression: • XOR can be implemented combinationally using more basic gates, as shown below. M. Frank, EEL3705 Digital Logic, Spring 2007

  20. 3-input XOR from MAJ, NAND, etc. • We can express XOR(a,b,c) as M. Frank, EEL3705 Digital Logic, Spring 2007

  21. Half Adder • Circuit to add any 2 given bits a,b to produce their 2-bit sum (002, 012, or 102) • Two bits of output: s1s0, given by s1 = ab, s0 = a⊕b • Called a “half adder” because two of them can be used to make a “full adder” (next slide) a (s1) (s0) b M. Frank, EEL3705 Digital Logic, Spring 2007

  22. Full Adder • Given bits a,b,c, computes (s1s0)2 = a + b + c. • Can build it using two half adders to compute the low-order bit of the sum as s0 = (a⊕b)⊕c. • Plus an extra OR gate needed to combine the carries. M. Frank, EEL3705 Digital Logic, Spring 2007

  23. Another Full Adder Implementation • This one uses 3-input XOR and MAJ subcircuits. M. Frank, EEL3705 Digital Logic, Spring 2007

  24. Ripple-Carry Adder • Uses a “carry chain” of 1-bit full adders to add two n-bit numbers carry bits a3a2a1a0+ b3b2b1b0cs3 s2 s1 s0 • The structure of the hardware reflects the flow of information in the ordinary hand-algorithm for binary addition M. Frank, EEL3705 Digital Logic, Spring 2007

  25. Closeup of One Stage of the Ripple-Carry Adder Structure • Each stage has: • input c used for “carry in” from previous stage • output s1 used for “carry out” to next stage • output s0 is one bit of the sum carry out carry in M. Frank, EEL3705 Digital Logic, Spring 2007

  26. 2-to-1 Selector (Multiplexer) • Implements • q=a if s=0, otherwise q=b. • In other words, s selects which input (a or b) to use as the output. Like C language statement q = s?b:a; • A straightforward implementation is below. M. Frank, EEL3705 Digital Logic, Spring 2007

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