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Digital Design: Principles and Practices. Chapter 8 Sequential Logic Design Practices. 8.4 Counters. Counter. The name counter is generally used for any clocked sequential circuit whose state diagram contains a single cycle, as shown in the next slide (Figure 8-23).
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Digital Design:Principles and Practices Chapter 8 Sequential Logic Design Practices
Counter • The name counter is generally used for any clocked sequential circuit whose state diagram contains a single cycle, as shown in the next slide (Figure 8-23). • The modulus of a counter is the number of states in the cycle. • A counter with m states is called a modulo-m counter, or divide-by-m counter. • A counter with a non-power-of-2 modulus has extra states that are not used in normal operation.
General Structure of a Counter State Diagram – A Single Cycle
Ripple Counter • A T flip-flop changes state (toggles) on every rising edge of its clock input. • Thus, each bit of the counter toggles if and only if the immediately preceding bit changes from 1 to 0, it generates a carry to the next most significant bit. • Although a ripple counter requires fewer components than any other type of binary counter, it does so at a price – it is slower than any other type of binary counter. • In the worst case, when the most significant bit must change, the output is not valid until time n．tTQ after the rising edge of CLK, where tTQ is the propagation delay from input to output of a T flip-flop.
Synchronous Serial Counter • CNTEN: Master count-enable signal • Each T flip-flop toggles if and only if CNTEN is asserted and all of the lower-order counter bits are 1.
Synchronous Parallel Counter • Synchronous parallel counter is the fastest binary counter structure.
2-Bit Asynchronous Counter (LSB) (MSB)
Asynchronous Counters • The clock input of an asynchronous counter is always connected only to the LSB flip-flop. • Asynchronous counters are also known as ripple counters.
Terms • Recycle • the transition of the counter from its final state back to its original state. • Modulus • the number of states • the maximum possible number of states (maximum modulus) of a counter is 2n, where n is the number of flip-flops in the counter.
4-Bit Synchronous Decade Counter • J0 = K0 = 1 • J1 = K1 = Q0Q3 • J2 = K2 = Q0Q1 • J3 = K3 = Q0Q1Q2 + Q0Q3
4-Bit Synchronous Decade Counter • J0 = K0 = 1 • J1 = K1 = Q0Q3 • J2 = K2 = Q0Q1 • J3 = K3 = Q0Q1Q2 + Q0Q3
The Johnson Counter • In a Johnson counter, the complement of the output of the last flip-flop is connected back to the D input of the first flip-flop. • A 4-bit Johnson counter has 8 states (or bit patterns). • A 5-bit Johnson counter has 10 states (or bit patterns). • In general, an n-bit Johnson counter will produce 2n states.
Shift Register • A shift register is an n-bit register with a provision for shifting its stored data by one bit position at each tick of the clock. • Shift Register Structures • Serial-in, serial-out • Serial-in, parallel-out • Parallel-in, serial-out • Parallel-in, parallel-out
Basic Shift Register Functions • Data Storage • Data Movement • Serial In / Serial Out • Serial In / Parallel Out • Parallel In / Serial Out • Parallel In / Parallel Out • Bi-directional
Serial In / Serial Out Shift Register With four stages, this shift register can store up to four bits of data.
Figure 9–4 Four bits (1010) being entered serially into the register.
