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Virtual and Cache Memory Example

Virtual and Cache Memory Example. Warning: this is intended to be viewed as a slide show. Do NOT print all slides. Print just Slide 2 for an overview. Virtual and Cache Memory Example. Virtual Address. re-issue request. Check TLB. Search Cache. Search Page Table. no. yes. no. Hit?.

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Virtual and Cache Memory Example

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  1. Virtual and Cache Memory Example Warning: this is intended to be viewed as a slide show. Do NOT print all slides. Print just Slide 2 for an overview.

  2. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Virtual Memory

  3. Ideal Situation:TLB hit, Cache hit

  4. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Processor: The processor issues a request for a piece of memory at a virtual address (the processor doesn’t know it is a virtual address, it just knows the address). Cache Virtual Memory

  5. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: the MMU checks in the Translation Lookaside Buffer (TLB) to see if the data at the virtual address is stored in main memory. Cache Virtual Memory

  6. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: If the mapping between the virtual address and the physical address is in the TLB, a TLB hit occurs, otherwise a TLB miss occurs. Cache Virtual Memory

  7. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: If a TLB hit occurred, the MMU uses the TLB mapping to convert the virtual address to a physical address (which refers to a location in main memory). Cache Virtual Memory

  8. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Memory: Use hardware to search in the cache (using tags) to see if the data at that memory address is stored in the cache. Cache Virtual Memory

  9. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Memory: If the memory address is found in the cache, then a cache hit has occurred. If it is not found, then a cache miss has occurred. T = hC + (1-h)M Cache Virtual Memory

  10. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Memory: Return requested data from cache. Cache Virtual Memory

  11. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Memory: Return requested data. Total time, with TLB hit and cache hit: 4-5ns. Cache Virtual Memory

  12. Cache Memory:What if you have a cache miss? A cache miss occurs when the data that you are trying to access is not currently in the cache.

  13. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Memory: If the memory address is found in the cache, then a cache hit has occurred. If it is not found, then a cache miss has occurred. T = hC + (1-h)M Cache Virtual Memory

  14. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Memory: Fetch the data from main memory and store it in the cache, using a replacement algorithm to evict previously cached data if necessary. Time: >220ns Cache Virtual Memory

  15. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Memory: Return requested data from cache. Cache Virtual Memory

  16. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Memory: Return requested data. Total time, with TLB hit and cache miss: ~220ns. Cache Virtual Memory

  17. Virtual Memory: What if you have a TLB miss? A TLB miss occurs when the mapping between the virtual address and the physical address is not stored in the TLB. It does not mean that the data is not in main memory.

  18. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: If the mapping between the virtual address and the physical address is in the TLB, a TLB hit occurs, otherwise a TLB miss occurs. Cache Virtual Memory

  19. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Search the actual page table for the mapping of the virtual address to a physical address, indicating that the data at that address currently in main memory. Cache Virtual Memory

  20. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: If the virtual address has a mapping in the page table, then the data is in main memory. This is a page hit. Otherwise, it is a page fault. Cache Virtual Memory

  21. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Use the address mapping in the page table to generate the physical address associated with the virtual address, indicating where the data is in main memory. Cache Virtual Memory

  22. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Update the TLB with the mapping between the virtual address and the physical address. Cache Virtual Memory

  23. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Reissue the memory request. This time, a TLB hit will occur and searching the cache will happen as in the first example. Cache Virtual Memory

  24. Virtual Memory: What if you have a page fault? A page fault occurs when the data at the virtual address is not currently stored in main memory, so does not have a physical address stored in the page table.

  25. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: If the virtual address has a mapping in the page table, then the data is in main memory. This is a page hit. Otherwise, it is a page fault. Cache Virtual Memory

  26. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: If a page fault has occurred, then update main memory by bringing the data in from secondary storage, using a replacement algorithm if needed. Cache Virtual Memory

  27. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Update the Page Table with the mapping between the virtual address and the physical address. Cache Virtual Memory

  28. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Generate the physical address indicating where the data at the virtual address is stored in main memory. Cache Virtual Memory

  29. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Update the TLB with the mapping between the virtual address and the physical address. Cache Virtual Memory

  30. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Virtual Memory: Reissue the memory request. This time, a TLB hit will occur and searching the cache will happen as in the first example. Total time: > 6ms. Cache Virtual Memory

  31. Virtual and Cache Memory Example Virtual Address re-issue request Check TLB Search Cache Search Page Table no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update Cache From Main Mem. Generate Phys. Address UpdatePage Table Return Data from Cache Update TLB Software Hardware Memory Data Cache Virtual Memory

  32. Virtual Address re-issue request Search #1 Search #2 Search #3 no yes no Hit? Hit? Hit? Update Main Mem. From Disk no yes yes Generate Phys. Address Update#2 Generate Phys. Address Update#3 Return Data Update#1 Hardware Software Memory Data

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