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Stavelet Noise Analysis Update

Explore the noise behavior of FEi4b chip on stavelet under different conditions. Investigate noise bursts, occupancy, stability, triggers, and more. Discover findings and next steps.

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Stavelet Noise Analysis Update

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  1. Manuel Silva,Hongtao Yang Maurice Garcia-Sciveres, Simon Veil Stavelet Noise Analysis Update

  2. Introduction • Study FEi4b noise while mounted on the stavelet under various conditions See link below for detailed purpose and procedure https://indico.physics.lbl.gov/indico/getFile.py/access?contribId=0&resId=0&materialId=0&confId=210

  3. List of Conditions Measure noise (AltFineC) as a function of: • Single chip vs quad module readout • Trigger rate • In black foam container • Increasing vs decreasing Vthin • Trigger multiplier • Position on stavelet • Bias Voltage • With several modules on other tabs • ....

  4. Stability w.r.t. Black foam container Noise occupancy vs Threshold (e) • Σ individual occupancy / # pixels • Higher AltFineC with black foam (less light)

  5. Stability w.r.t. trigger multiplier Noise occupancy vs Threshold (e) • Σ individual occupancy / # pixels • Burst points for TrigCnt ≥ 8

  6. Noise Burst? • Unclear if noise at low threshold is continuously produced by chip • Use Cosmic GUI with external triggering • 31.25 kHz trigger • Trigger Multiplier 16 • Same config file from previous plots • Use Vthin = 65 to find the bursts • Verify results using Stcontrol/USBpix

  7. Finding the Burst Occupancy plot shows total hits of FE1 every 160 triggers

  8. Disabled Half of FEi4b Disabled half the chip using “DisableColumnCnfg”, ran for ~10^7 triggers No noise bursts

  9. Disabled Columns Disabled columns 6-14 & 68-72 using “DisableColumnCnfg”, ran for 10^{7} triggers No noise bursts

  10. ENABLE Masks Left: Disabled rows 0 – 38 (ganged region) using ENABLE mask, ran for 10^{7} triggers Right: Disabled columns 68-72 rows 39-335 using ENABLE masks, ran for 10^{7} triggers No noise bursts

  11. STcontrol • Use STcontrol NOISE_OCC scan with external triggering • 31.25 kHz trigger • Trigger Multiplier 16 • Tuning required under same conditions as previous tests • At Vthin = 65, no noise bursts were seen after 10^{7} triggers • Set Vthin = 55

  12. Disabled Half of FEi4b Disabled half the chip using “DisableColumnCnfg”, ran for ~10^{7} triggers One noise burst seen

  13. Noise Burst Conclusion • Burst also seen at higher thresholds in previous study • Frequency of burst depends on: • Threshold • Number of active pixels • Number of noisy pixels

  14. Next Steps

  15. Different Pattern • Before @ Vthin=66 After @ Vthin=66 Noise pattern now seen at low thresholds (under the same conditions), same pattern appears on both LBLQ1 and LBLQ2 for all chips

  16. Locating the Problem • Removed module from stavelet • Same tuning • Noise pattern gone • Unstable setup?

  17. Next Steps Measure noise (AltFineC) as a function of: • Single chip vs quad module • Trigger rate • In black foam container • Increasing vs decreasing Vthin • Trigger multiplier • Position on stavelet • Bias Voltage • With several modules on other tabs • ....

  18. Extra/Backup

  19. Stavelet Design Each stavelet has 4/5 tabs per side 30-pin connectors for flex, only has two readout channels Multiplexing quad module needed to read quad module Wired for serial power to all modules 30-pin connector 80-pin connector HV lines

  20. Quad Module with Mux Temperature thermistor mounted directly above chips Supplied 2.35V from flex directly CLK N CLK P LVDS to CMOS receiver 2 channel (2:1) multiplexer

  21. LBL Quad Modules LBLQ1 has two working chips • Real sensor • FE1/2 direct readout LBLQ2 has three working chips • Real Sensor • Mux FE2/3, direct readout FE1 LBLQ3 has three working chips • Pseudo sensor • Mux FE0/3, direct readout FE1 LBLQ0 has four working chips • No sensor • Mux FE0/1, Mux FE0/1

  22. Stavelet Setup HV Power Supply Stavelet to RJ45 Connector Demux Board RJ45 to HSIO Connector

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