CMSC 150 program execution

1. CMSC 150program execution CS 150: Wed 1 Feb 2012

2. Stored Program Concept 01010010 127 128 01010110 129 01110010 CPU 130 11010010 10110010 131 registers … 132 10111110 133 11100000 134 00000001 ALU control unit . . . … 01010010 11100000 …

3. Our Example Architecture Main Memory …

4. Our Example Architecture Main Memory Address 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 …

5. Our Example Architecture Main Memory Address 00000 Central Processing Unit 00001 00010 Instruction Register Program Counter Register 00011 00100 00101 00110 00111 Data Register 01000 01001 …

6. Our Machine Language

7. Our Hypothetical Computer Main Memory CPU Instruction Register Program Counter Register … Data Register

8. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) CPU Instruction Register Program Counter Register … Data Register

9. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) • Number of instructions: 8 CPU Instruction Register Program Counter Register … Data Register

10. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) • Number of instructions: 8 • To represent 23 = 8 total instructions, need 3 bits CPU Instruction Register Program Counter Register … Data Register

11. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) • Number of instructions: 8 • To represent 23 = 8 total instructions, need 3 bits • Leaves 5 bits to represent addresses CPU Instruction Register Program Counter Register … Data Register

12. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) • Number of instructions: 8 • To represent 23 = 8 total instructions, need 3 bits • Leaves 5 bits to represent addresses • 5 bits for addresses: 25 = 32 memory cells 00000 00001 00010 00011 00100 00101 CPU 00110 Instruction Register Program Counter Register 00111 01000 01001 … Data Register 11110 11111

13. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) • Number of instructions: 8 • To represent 23 = 8 total instructions, need 3 bits • Leaves 5 bits to represent addresses • 5 bits for addresses: 25 = 32 memory cells 00000 00001 00010 00011 00100 00101 CPU 00110 Instruction Register Program Counter Register 00111 01000 01001 … Data Register 11110 11111

14. Our Hypothetical Computer Main Memory • Word size: 8 bits (1 byte) • Number of instructions: 8 • To represent 23 = 8 total instructions, need 3 bits • Leaves 5 bits to represent addresses • 5 bits for addresses: 25 = 32 memory cells 00000 00001 00010 00011 00100 00101 CPU 00110 Instruction Register Program Counter Register 00111 01000 01001 … Data Register 11110 11111

15. Data In Our Computer • Use sign-magnitude to represent integers • 8 bits for data • leftmost bit will be sign (0: non-neg; 1: neg) • 7 remaining bits: magnitude in binary 00001011 = +11 10001011 = -11

16. Eight Machine Language Instructions Underline: an argument (value) required by that instruction

17. Example of an Instruction 00110110 one word (here, one byte)

18. Example of an Instruction 00110110 Instruction code

19. Example of an Instruction 00110110 Argument (memory address)

20. Example of an Instruction 00110110 Decoding the Instruction:

21. Example of an Instruction 00110110 Decoding the Instruction: Copy to …

22. Example of an Instruction 00110110 Decoding the Instruction: Copy to …

23. Example of an Instruction 00110110 Decoding the Instruction: Copy to address 10110…

24. Example of an Instruction 00110110 Decoding the Instruction: Copy to address 10110 from DR This instruction copies the contents of the data register into memory cell addressed 101102 = 2210

25. Example of an Instruction 10000000 Decoding the Instruction: Read from input…

26. Example of an Instruction 10000000 Decoding the Instruction: Read from input… No argument…

27. Example of an Instruction 10000000 Decoding the Instruction: Read from input… No argument, hence zeros (to fill the byte)

28. Example of an Instruction 10000000 Decoding the Instruction: Read from input into DR This instruction copies a word from the input unit into the data register

29. Preparing To Execute a Program • Your program is first written in a high-level language (e.g., Java): source code • Converted into machine language:executable • To run, executable is copied into main memory • PC is loaded with the memory address of the first instruction in the executable

30. Fetch-Execute Cycle • Copy the word referred to by the PC into the IR (i.e., fetch) • Increment the address stored in the PC • Decode & execute the contents of the IR • Unless a stop instruction, goto step 1

31. 1 CPU Main Memory Program Counter Instruction Register Data Register Executable Program Input Unit Output Unit Initial state of memory after loading program and setting PC to 00000

32. 2 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 1. Copy word referred to by PC into Instruction Register

33. 3 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 1. Copy word referred to by PC into Instruction Register

34. 4 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 1. Copy word referred to by PC into Instruction Register

35. 5 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 2. Increment the Program Counter

36. 6 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and Execute instruction

37. 7 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and Execute instruction – 000 is op code for CopyFrom

38. 8 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and Execute instruction – 01001 is address to copy from

39. 9 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and Execute instruction – 01001 contains a word

40. 10 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and Execute instruction – Instruction execution is complete

41. 11 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit Repeat: 1. Copy word referred to by PC to IR

42. 12 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit Repeat: 1. Copy word referred to by PC to IR

43. 13 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 2. Increment PC

44. 14 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and execute instruction

45. 15 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and execute instruction – 110 is the op code for IfNegGoTo

46. 16 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and execute instruction – Check value in data register

47. 17 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and execute instruction – DR value is -1

48. 18 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and execute instruction – Copy rightmost 5 bits of IR to PC

49. 19 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 3. Decode and execute instruction – execution is complete

50. 20 CPU Main Memory Program Counter Instruction Register Data Register Input Unit Output Unit 1. Copy word referred to by PC to IR