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NanoComputers

NanoComputers. May 10, 2001 Michael Pan MeiYa Li Rebecca Stadler. Introduction. Moore’s Law Lower limit for Transistor Size 1 micrometer, or 50 nanometers Loss of functionality New technological field required Nanotechnology. Nanotechnology. Manipulation of atoms 1 at a time

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NanoComputers

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  1. NanoComputers • May 10, 2001 • Michael Pan • MeiYa Li • Rebecca Stadler

  2. Introduction • Moore’s Law • Lower limit for Transistor Size • 1 micrometer, or 50 nanometers • Loss of functionality • New technological field required • Nanotechnology

  3. Nanotechnology • Manipulation of atoms 1 at a time • Decrease in the size of transistors • Increase in density • Concurrent advances in biology and chemistry • 1990’s • Ability to position single atoms

  4. Types of Nanocomputers • Mechanical Nanocomputers • Chemical Nanocomputers • Quantum Nanocomputers • Electrical Nanocomputers • Does not require a fundamental change in the operating principles of the transistor

  5. Potential Technologies for use in a Nanocomputer • Devices are based on the principles of quantum mechanics • Include: • Resonant Tunneling Transistor • Single Electron Transistor • Quantum Dot

  6. Resonant Tunneling Device • RTD is comprised of 2 insulating barriers in a semiconductor heterostructure • Creates an island • Island is about 10 nms wide • Potential Well • Finite, integral number of “quantized” energy levels • Electrons are able to pass through the device by tunneling through 2 barriers • Depends on the energy of the incoming electrons as compared to the device’s internal energy level • Needs to be in resonance for current to flow

  7. Resonant Tunneling Transistor • Incorporate an RTD into emitter of a Bipolar Junction Transistor • Three terminal device, similar to MOSFET • Current controlled, rather than voltage controlled • RTT as a 2 state device • RTD serves as a filter, allowing current to flow to BJT at certain base-emitter voltages only • Transistor “on” or “off” • Problem: Nanometer device integrated with a microelectronic device • Size limitations

  8. Single Electron Transistor • SET operates by moving single electrons • Consists of a source, island, and drain • Electrons can enter the island one at a time • Tunnel onto the island from source, exit via drain • Control the number of electrons entering and exiting the drain • Electron flow continues, causing a current flow through the island

  9. SET • Use a metal gate electrode near the island • Increase gate voltage, an additional electron can tunnel on and off island, creating measurable current • Step-wise function • Limitations • Low Temperatures to avoid thermal energy

  10. Quantum Dot Cells • Small potential well or box • Electrostatic field to determine the number of electrons in the quantum dot • Holds 0 – 100’s of electrons • Rely on specific quantum effects • Cannot store and retrieve information • Exact number of electrons is not known, due to low resistivity of the device

  11. QDs • Quantum dots can effect one another • Even if they are not wired together • Due to long-range electrostatic interactions • One dot’s electric field can change the number of electrons in another dot • Quantum dots can be lined up to cause the movement of electrons • Two state device corresponding to occupancy of the dot by 0 or 1 electron • Wireless because of communication through electric field • Limitations of fabrication and low temperature

  12. Architectures for Molecular Electronic Computer Logic

  13. Background • Diode • AND • OR • XOR • Half-adder • Molecular-scale electronic devices

  14. Diode • Two-terminal switch • On: closed, forward bias • Off: open, reverse bias

  15. AND Gate • Output = 1: • All inputs are 1 • Output = 0

  16. OR Gate • Output = 0: • All inputs are 0 • Output = 1: • Any input is 1 • All inputs are 1

  17. XOR Gate • Output = 0: • All inputs are 0; • All inputs are 1 • Output = 1: • Only one input is 1

  18. Half-Adder Gate • Combinational circuit • Two inputs and two binary outputs • The output variables produce: • Sum, S: least significant bit • Carry, C: output =1 -> both inputs are 1

  19. Molecular-Scale Electronic Device • Polyphenylene-based molecular backbone chains • Carbon nanotubes

  20. Polyphenylene-based molecular-scale electronic devices • chains of organic aromatic benzene rings

  21. Aromatic Organic Molecules • Serves as conductor • Benzene ring: • Chemical formula: C6H6 • Phenyl group: • C6H5 • Phenylene group: • C6H4 • Polyphenylene: • Binding phenylenes to each other, terminatin the result chain-like structures with phenyl groups • Different types of molecular groups: aliphatic, ethenyl, ethynyl.

  22. Aliphatic Organic Molecules • Serves as insulators • Forms a barrier: middle of conductive polyphenylene chain

  23. Polyphenylene-based molecular rectifying diodes switch • Two intramolecular dopant group: • X, Electron donating • Y, Electron withdrawing • Separate by R: aliphatic groups

  24. Molecular Electronic AND Gate • Using Diode-Diode Logic • Dimension: 3x4nm2

  25. Molecular Electronic OR Gate • Using Diode-Diode Loigc • Dimension: 3x4nm2

  26. Molecular Electronic XOR Gate • Using Diode-Base Logic • N or Z: represnts an RTD • Dimension: 5x5nm2

  27. RTD • Resonant Tunneling Diodes

  28. Molecular Electronic Half Adder • Combinational logic: • Several molecular logic gate to bond together • Molecular XOR and AND gate

  29. Conclusion • The area of the molecular electronic logic structures is one million times smaller than analogous logic structures. • Both molecular AND and OR gates are using Diode-Diode logic structure. • Different between the molecular AND and OR gate is the orientation of the molecular diodes is reversed.

  30. Conclusion (cont.) • XOR uses Diode-Based logic structure. • Molecular XOR gate is very similar to molecular OR gate, except for the addition of the molecular RTD. • The most well-known combinational circuit for a binary half adder design is implemented with an XOR and an AND gate.

  31. Fabrication and Future Studies • Abstract • Introduction • Fabrication techniques • Future challenges • Conclusion

  32. Abstract • the laws of quantum mechanics and the limitations of fabrication techniques may soon prevent further reduction in the size of today’s conventional field-effect transistors • the devices will become more difficult and costly to fabricate

  33. Introduction • Improved fabrication technologies are the key to progress in nanotechnology and nanoelectronics. • No matter how small a proposed electronic device can or should be built in theory, the limitations in fabrication processes determine how small the device can be built in practice.

  34. Present Fabrication Techniques • Lithography • Molecular Beam Epitaxy (MBE) • Mechanosynthesis • Chemosynthesis

  35. Lithography • Lithography uses a beam of light or matter to make a pattern on a surface. There are several lithography techniques that are currently being used in the industry; including UV lithography, X-ray lithography, atom lithography and Electron-beam lithography.

  36. UV Lithography • Most modern integrated circuits are produces by photolithography. Photolithography is a process that beams visible or ultraviolet light through a reusable mask and onto a thin coating of photoresistive material covering a silicon wafer.

  37. X-ray Lithography • X-ray lithography is a further refinement of lithographic techniques using ultraviolet light. This refinement provides a more precise tool with which to carve out a pattern on a substrate. The smaller wavelengths of X-rays allow feature sizes from 500 to 30 nm.

  38. Electron-beam lithography • Electron-beam lithography replaces the light beam and masks used in photolithography with a direct beam of electrons. It works well with for high resolution features because electrons have much shorter wavelengths than light and can be focused very precisely using electric field.

  39. Atom Lithography • Atom lithograph actually writes the atom directly onto the substrate. It uses the standing wave of light as mask to guide a beam of atoms to desired resting places on the surface of a wafer.

  40. MBE • MBE is an advanced fabrication technique for creating layered surfaces. Molecular beam epitaxy uses a beam of molecules under low pressure that collides with a heated single-crystal surface to create epitaxial layers of molecules.

  41. Mechanosynthesis • Nanoelectronic devices maybe one day be assembled by the mechanical positioning of atoms or molecular building blocks one atom or molecule at a time, a process known as mechanosynthesis

  42. Chemosynthesis • Chemosynthesis is also an emerging fabrication of the components for nao-scale electronics. • Chemical self assembly is the spontaneous orientation of a number of molecules. It usually occurs in non-covalent bonding among molecules. One advantage of this method is the error correction process. It corrects the wrong type of molecules, and wrong positioned molecules in the assembly process. Another type of chemosynthesis is Hybrid Chemosynthesis, it combines the use of atom beams with some techniques of self-assembly.

  43. Future Challenges • I. Demonstration of a molecular electronic rectifier or transistor • We need to increase the density and raise the temperature in which nanoelectronic devices can operate above the cryogenic range, it is very important to fabricate nanoelectronic devices on the same scale as a single molecule. One proposed method is to design and synthesis of single molecule.

  44. Future Challenges(Cont.) • II Fabricate working electronic device from molecular transistors • Even if we know how to make molecular transistors, the assembly of these components into a working logic structure still presents a problem. • One possible method to the assemble such a device is to use a scanning-tunneling electron microscope to arrange the molecular components on a surface

  45. Future Challenges(Cont.) • III Demonstration of a nanoscale Silicon quantum heterojunction • For us to reduce the size of modern electronic devices down to the nanometer scale, it is apparent that we need to construct quantum wells of that dimension. Knowing that, we must build very tiny layers of solid structures, where each layers are made of different semiconductors with different energies. These layered structures as we know are semiconductor heterojunctions. We need to make them reliably on the nanometer scale, and make them on the nanometer scale out of silicon compounds.

  46. Future Challenges(Cont.) • IV Demonstration of nanometer-scale quantum dot cellsand wireless logic.0 • The design for constructing wireless quantum dot computer logic is a very promising idea for implementing nanoelectronic computers. In order to make nanometer-scale devices of this type, we need to come up with a method to fabricate and test this device.

  47. Future Challenges(Cont.) • V Demonstration of Terabit quantum-effect electronic memory chip. • If we were to build nanoelectronic logic devices, it is very possible to assemble from them is terabit (10^12 bit) memory array. With terabit memory array, we would have a much larger storage. Also, we will have a much faster access and no moving mechanical parts. Storage of a movie on a such chip is on example.

  48. Future Challenges(Cont.) • VI. Nanofabrication with a micro-STM or micro-AFM • It is very difficult to mechanically assemble nanoscopic structures and devices with macroscopic probes. Using microelectromechanical systems (MEMS) devices will permit more efficient mechanical manipulation of nanometer-scale structures. We will need to apply micro-STMs and micro-AFMs to practical nanofabrication.

  49. Future Challenges(Cont.) • VII. Parallel nanofabrication with a micro-STM or micro -AFM arrays • For one thing, if nanoelectronics is to become practical and reliable, we must fabricate nanometer-scale structures by the billions and with high effieniency. Now, we fabricate nanostructures one at a time with a micromechanical STM or AFM is simply not enough.

  50. Future Challenges(Cont.) • IIIV. Responsive virtual environment for realistic, stimulated nanomanipulation. • We need to be able to simulate nanometer-scale experiment in real time on a digital computer, then use that computer simulation to generate a virtual environment. • The quantum simulations required for this type of simulated virtual environments are well beyond our current quantum simulation technology. We need to work and address this problem.

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