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EDF-DVS on PowerPC 405LP: Feedback-based Energy Management for Battery-Constrained Embedded Systems

This study explores the implementation of feedback-based energy management, specifically in the context of Earliest Deadline First (EDF) scheduling with Dynamic Voltage Scaling (DVS) on the IBM Embedded PowerPC 405LP. The study includes a comparative analysis of various DVS techniques and their impact on energy savings. The results show that the feedback-based EDF-DVS scheme outperforms other approaches, achieving up to 64% reduced energy consumption.

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EDF-DVS on PowerPC 405LP: Feedback-based Energy Management for Battery-Constrained Embedded Systems

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  1. Feedback EDF Schedulingw/ Async. DVS Switching on the IBM Embedded PowerPC 405 LP Frank Mueller North Carolina State University, Center for Embedded Systems Research (CESR) Departments of Computer Science

  2. Embedded Systems • Energy management • battery-constrained embedded systems • vital design constraint • Dynamic Voltage Scaling (DVS)

  3. Dynamic Voltage Scaling (DVS) • Processor core voltage ↑ or ↓ depending on computation demands • V ↓ f ↓ • DVS in real time systems • calculate safe operation frequency • guarantee all tasks meet deadlines

  4. Why PowerPC 405LP? • Hardware support for DVS • Software support to change voltage • via user-defined operating points • for e.g., 266 MHz @ 1.8 V to 33 MHz @ 1 V • Ability to execute instructions while frequency/voltage is changed • doesn’t enter sleep mode during frequency/voltage transitions

  5. fhigh exec flow exec sleep fhigh exec flow exec exec PPC 405LP Development Board • Embedded Linux variant • Fast DVS switching (≤ 200 μs) • Two DVS modes • synchronous (blocking) • conventional DVS-capable processors • asynchronous (non-blocking) • execution may proceed during switch • unique feature in 405LP

  6. voltage current Asynchronous Switching System call for asynchronous switch Voltage ramped up to max • time to reach new voltage level is estimated High-resolution timer interrupt triggered • power management unit reprogrammed • new processor frequency activated • voltage settles in a controlled manner to new operating point 2 1 1 2 3 3 frequency

  7. Dynamic Power Management (DPM) • Software and hardware components • Define stable operating points (freq./voltage pairs) • Support both synchronous and asynchronous DVS

  8. EDF-DVS on PPC 405LP • User-level threads package under Linux • Real-time earliest deadline first (EDF) scheduler • Several hard real-time software DVS techniques • static • cycle-conserving • look-ahead 1+2 • Simple + PID feedback • AGR-2 • Voltage and current measurements • analog data acquisition board • oscilloscope Pillai and Shin, 2001 Zhu and Mueller, 2002 Aydin et al., 2002

  9. Threads Library • Kernel-level threads • complex kernel modifications – error-prone • more control over execution • User-level threads • simplicity of design • develop generic and portable threads library • facilitate easier debugging • less control over execution and resources • however, OS background activity minimal

  10. Threads Library Implementation main () Spawn T1 Spawn T2

  11. periodB periodA A1 A2 EDF schedulability test time EDF Scheduling Task A release A1 deadline A1 release A2 Task B B1 B2 B3 B4 deadline B1 release B2 release B1 EDF B1 A1 B2 B3 A2 B4

  12. Example Task Set U = α = 2/10+2/10+4/10 =0.8 f = α x fmax = 0.8 x fmax

  13. dynamic slack Static RT-DVS EDF fmax static slack αfmax α = WC utilization 0 ≤ α≤ 1

  14. dynamic slack Cycle-Conserving RT-DVS EDF fmax static slack αfmax α = WC utilization 0 ≤ α≤ 1

  15. Look-Ahead RT-DVS EDF fmax static slack αfmax α = WC utilization 0 ≤ α≤ 1 dynamic slack

  16. Feedback RT-DVS EDF fmax static slack αfmax α = WC utilization 0 ≤ α≤ 1 No remaining dynamic slack

  17. Experimentation Methodology • Need to measure voltage/current at a high rate • Multimeters – coarse-grained and low precision • High frequency analog data acquisition board • current measured as voltage level over a resistor with 1V drop per 360 mA • Oscilloscope • visualizing voltages and currents • high precision

  18. Valid Frequency/Voltage Pairs

  19. DVS Overhead

  20. Scheduler Overhead

  21. Task Sets

  22. Energy Savings of DVS Techniques

  23. Energy Savings of fast DVS modulation

  24. Energy Consumption for 3 Tasks

  25. Energy Consuption for 30 Tasks

  26. 360mA 360mA 360mA 360mA 0mA 0mA 0mA 0mA 2V 2V 2V 2V 1V 1V 1V 1V Oscilloscope time time time time

  27. Conclusions • State-of-the-art EDF-DVS on PowerPC 405LP • Measured energy • Differs from simulations • But match trends from simulations • Feedback EDF-DVS • better than any other scheme • up to 64% reduced energy, 24% better than others • Async. Switching  only 1-5% energy savings • First comparative study on actual processor

  28. Acknowledgements • Bishop Brock – IBM Research (Austin) • DPM S/W extension • Linux kernel support • H/W modifications • DVS overhead data • IBM Research (Austin) • Power PC 405LP development board • Students • Yifan Zhu • Ajay Dudani • A. Anatharam, A. Mahmoud, R. Venkatesan

  29. Questions?

  30. Backup Slides

  31. Real-Time Scheduler Integration

  32. Worst-Case Timing Analysis • No tool support to derive WCETs of tasks on PPC405LP • Timing loop computes average execution of N instances of the task taking into account loop overhead and cold cache misses t1 = gettimeofday(); for ( i = 0; I < N; i++); t2 = gettimeofday(); work(); t3 = gettimeofday(); for ( i = 0; I < N; i++) work(); t4 = gettimeofday();

  33. DVS Overhead

  34. 360mA 360mA 360mA 360mA 0mA 0mA 0mA 0mA 2V 2V 2V 2V 1V 1V 1V 1V Oscilloscope – Tight Task Set time time time time

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