160 likes | 306 Views
Progress in 3DG. Adviser : PhD Jin-Hua Hong student : Jun-Yi Wu Date : 2008/12/18. outline. 3DG system Test architecture Testing core and wrapper Future work Low Power Test Architecture. . 3DG system Test architecture Testing core and wrapper Future work
E N D
Progress in 3DG Adviser :PhD Jin-Hua Hong student :Jun-Yi Wu Date :2008/12/18
outline • 3DG system • Test architecture • Testing core and wrapper • Future work • Low Power Test Architecture
• 3DG system • Test architecture • Testing core and wrapper • Future work • Low Power Test Architecture
3DG system • TIC and IEEE-1500 in 3DG
TIC architecture in 3DG • Utilize TESTACK to select Normal/Test function. In test mode TESTACK will be HIGH.
IEEE-1500 architecture in 3DG • Between IP and AHB wrapper put boundary scan cell, and IEEE-1500 to control boundary scan cell.
External pins in 3DG • TIC: TESTREQA TESTREQB TESTACK • IEEE-1500: WSI WSO WRCK TMS WRSTN
3DG system • Test architecture • Testing core and wrapper • Future work • Low Power Test Architecture
Testing Architecture with IEEE-1500 and TIC • Include IEEE-1500 and TIC
Testing Core by IEEE-1500 • Utilize IEEE-1500 to testing AMBA core
Testing Core by TIC • Utilize TIC to testing AMBA core
Testing Wrapper by IEEE-1500 and TIC • Utilize TIC and IEEE-1500 to testing wrapper output.
Testing Wrapper by IEEE-1500 and TIC • Utilize TIC and IEEE-1500 to testing wrapper input.
3DG system • Test architecture • Testing core and wrapper • Future work • Low Power Test Architecture
Low Power Test Architecture • In test mode, TIC will use address and TESTACK to control power management, then power management will cut don’t test IP’s power and clock.
整合進度 • 之前GM的SCAN CHAIN有誤,導致整合時模擬跑到一半當機,目前重新進行加入SCAN CHAIN中 • ARM7裡的SCAN CHAIN無法與現有GM與RM的SCAN CHAIN整合,因此將會將ARM7從新加入可以與GM與RM整合的SACN CHAIN