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DT Consolidation Summary

This project aims to enhance the communication reliability of the MC secondary link system by replacing the existing 485 boards and integrating all patches on new PCB boards. The upgrade will maximize the USC-UXC link speed and ensure compatibility with present hardware.

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DT Consolidation Summary

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  1. DT Consolidation Summary C. Fernández Bedoya on behalf of DT Upgrade group July 6th, 2010

  2. MC secondary link upgrade for 2012 shutdown From Franco G. Replacement of 485 boards (10) housed in SC crates Improvements in secondary link system done 2 years ago have solved the many RS485 IC ruptures on MC linkboard But: Improvements were realized with many ‘handmade’ patches added to boards The UXC-USC link for half wheel is slow, 38.4Kbps Often 485 boards lost communication with DCS (last week 2 of 10, sometimes more) Recovering requires cycling on/off the SC crate Enhancement of MC communications reliability Integration of all patches on PCB new 485 board Maximization of USC-UXC link speed Boards remain compatible with present hardware Required the modification of part of DCS server software Cost: about 15Keuro. Man power by INFN PD

  3. MC SECONDARY LINK present system after 2008 improvements From Franco G. Primary serial link -> optical fiber MC communication Secondary serial link -> RS485 copper chain Half wheel RS485 board 38.4Kbps Sector 1/7 driver485 Sector 2/8 38.4Kbps driver485 UXC Upper/bottom SC 9U crate Sector 3/9 controller Sector 4/10 38.4Kbps driver485 Sector 5/11 driver485 38.4Kbps Sector 6/12 UXC-USC optical link 38.4Kbps 485 chain termination & overvoltage protection

  4. From Franco G. Proposed new 485 BOARD 485 chain termination & overvoltage protection RS485 38.4Kbps RS422 link to ADLINK PMC8681 (PMC board already mounted on VME SC crate controller) 230.4Kbits full duplex S1/S7 S2/S8 485 link controllers 1/sector S3/S9 USC Interface controllers S4/S10 S5/S11 S6/S12 Backup optical link 38.4Kbps for present system compatibility (upgradable to 230.4 full duplex) Power from LV caen module

  5. Consequences of LHC plan for DT: C. Fernández Bedoya July 6th, 2010 5 • Reassess the robustness of our stock of spares, in particular for on detector electronics (with only 2 openings of CMS, the number of hot spares needs to be larger than planned): • Meticulous failure rate measurements during 2010 • On detector electronics: • Not sensible redoing the Minicrates before 2020, however we are for sure short of BTIM. • Present approach is remaking the theta trigger boards and use old boards to retrieve spare BTIMs • UXC racks electronics: • CAEN Low Voltage connectors: weak point in particular for A3100. • Plan is to move to A3100B (bolts) this year. • For A3050 the plan is to test lubricant in 10% of the detector this year and see how it behaves. • Sector Collector electronics: • Currently we need to wait until LHC stops to get UXC access in order to fix a SC problem. A SC problem may handicap a large fraction of the detector (min a sector in trigger or readout). • Present approach under study is to make a “simple” copper to OF conversion at SC level and move SC electronics to USC Expectations: 3 ROBus/year , 5 TRB/year, 1 CCB Link/year Failure rate= 46 in 2009, 4 in 2010 Failure rate low at present (~1/year)

  6. From J. Nash April 2010.

  7. C. Fernández Bedoya July 6th, 2010 7 • A CMS TECHNICAL PROPOSAL is under development. • Draft version has been circulated in June. • Final version has to be available by September. • PHASE 1 DT PROPOSAL (by 2015) • Long cosmic rays data taking and first pp collisions did not show any relevant weakness in the overall detector performance (resolutions, tracking capabilities, efficiencies). • But there are a few places in the electronics path that have room for improvement: • Trigger Boards • Sector Collector • Drift Tubes Track Finder (Janos´s talk)

  8. C. Fernández Bedoya July 6th, 2010 8 THETA TRB REPLACEMENT MOTIVATION - BTIM mortality was high during production tests (25% spares to 3% spares). - TRB failure rate was high (1%) during commissioning phase (thermal stress?). The rate seems to have lowered down and it needs to be totally understood during steady operation. PROPOSAL: *BTI was produced in now obsolete ATMEL 0.5 um technology. *We are investigating the migration to FPGA (optimizes production timescale and leaves space for possible modifications), which can also be moved to an ASIC production later if desired. *The present plan is to replace THETA TRB with the newly produced FPGA-based ones and use the removed boards as source of spare BTIMs to be used to repair failing PHI TRBs. *The actual implementation program will depend on the shutdown plans but we estimate that all boards of one MBX can be replaced in 6 months. *Present proposal is to replace all boards in one full station (i.e. MB3) by 2015: 2010 Production of 2 prototype boards 2011 Bench tests and decision about the replacement strategy 2012-2013 Mass production and test 2014-2015 Installation 2015 Decision about strategy in view of high luminosity operation Estimated cost 360 k€ for 3 BTIs/FPGA.

  9. THETA TRB REPLACEMENT • Present situation: • ACTEL ProAsic 3 identified as best device in terms of radiation tolerance • Working prototypes of BTI algorithm inside the device have been qualified through test vectors • Studies of number of BTIs/device are on going. • At present 2 BTIs/ACTEL is feasible in terms of timing => 16 devices/TRB • 3 BTIs/ACTEL done but timing not yet correct (76 MHz vs 80MHz) • A prototype board is being developed to understand possible problems. • Some concerns about higher power consumption under study F. Montecassiano

  10. Studies performed to improve theta resolution (in new theta TRB) show that the gain (factor 2 in theta angle resolution) may not be worth the additional complications (tied to DTTF modifications). P. Zotto

  11. SC to USC C. Fernández Bedoya July 6th, 2010 11 MOTIVATION: -Downtime in case of failure is high since we have to wait until LHC stops to get access to UXC. -A SC problem may handicap a large fraction of the detector (one sector). -Power dissipation is already marginal for CMS cooling system (lower life of electronics, plus any increase in performance cannot be accompanied by an increase of power consumption if present location remains). In longer term view that will simplify future upgrades, some room for improvement: New ROS: -Event processing time can be increased significantly (good for synchronous events or larger occupancy (SLHC?) than expected) -Better “normal” noise rejection capability (1 or 2 hits per ROB could be cancelled if desired) New TSC+OptoRX merged board: -Solve clock sensitivity -automatic masking if unlock -Reduce L1A latency -Improve theta resolution? PROPOSAL: -Move SC from UXC to USC to minimize impact of failures -Make a “simple” copper to OF conversion at SC level and modify input mezzanines of ROS and TSC -Low impact modifications compatible with present system and future upgrades

  12. C. Fernández Bedoya July 6th, 2010 12 SC to USC • Make a “simple” copper to OF conversion at SC level and move SC electronics to USC Present proposal is to make a 1 to 1 channel Cu-OF (3500 links in total) UXC USC 1 @ 800Mbps -> 25 @ 240Mbps ROS 25 @ 240 Mbps TSC 32 @ 480 Mbps 6 @ 1.6Gbps -> 32 @ 480Mbps Each sector: Equalizer Laser driver • Plus few components for bias setting (DAC) and monitoring. • OF could be extracted from the back of the SC crate 25/ROS 32/TSC … Equalizer

  13. C. Fernández Bedoya July 6th, 2010 13 SC to USC -Move SC crates to USC (VME access in UXC may not be needed, compatible with future RS485 board) -Modify input ROS and TSC mezzanines for OF reception Fully compatible with present system Drawbacks: -trigger latency may be slightly increased -Find space in USC for 10 SC crates -Route large number of fibers (with present 48 fibers => 73 cables)

  14. C. Fernández Bedoya July 6th, 2010 14 SC to USC Preliminary studies: -We have done some preliminary tests at lab with an scheme: ROB -> Cu-OF -> OF-Cu -> ROS and first results were positive. -We are developing a prototype board for studying different options of Cu-OF and OF-Cu conversion. -Equalizer and VCSEL have already been tested under radiation, doubt remains on laser driver. PRESENT PLAN -Fibers installation is what will need longer access time. -For the rest a scaled installation can take place in short shutdowns, also, minimal unit to replace is a SC crate 1. Installation of fibers between UXC and USC (up to 3500 links distributed in 73 or 30 multi- ribbon cables). 2.a. Allocation of TSC and ROS in USC according to the space made available. 2.b. Modification of TSC and ROS input mezzanines to support optical link reception. 3.a. Redesign of ROS electronics with a new slow control interface (uTCA?) higher performance. 3.b. Redesign of TSC and Opto-RX electronics integrated in a single unit compatible with the new DTTF design. Estimated cost 800 k€ (+600k€ if ROS and TSC are totally redesigned)

  15. C. Fernández Bedoya July 6th, 2010 15 I think any changes we made should try to be as compatible as possible with present electronics Rebuilding full chains is very unrealistic Step 2 Present Step 1 Not in present TP proposal Cu-OF (trg) Minicrate Minicrate Cu-OF (RO) Minicrate OF Patch panel ROS TSC Cu-OF (RO) Cu-OF (trg) UXC UXC UXC USC USC USC OptoRx ROS TSC + OptoRx ROS DDU DTTF TSC + OptoRx DTTF DDU DTTF DDU

  16. C. Fernández Bedoya July 6th, 2010 20 SC to USC -I have contacted a company in Spain (CORNING Cablesystems) -They offer optical fibers adequate to our necessities (50/125 um, data rates, etc) with Clearcurve technology (much better bending ratio with no optical loss) -144 fibers cable is still < 10 mm diameter (like our 48 fibers one) This is 144 fibers! That means 30 cables for the full system (instead of 73) There is also a group at CERN that can make the fibers installation, we are contacting them

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