Where We’ve Been

Where We’ve Been • Binary representations • Boolean logic • Logic gates – combinational circuits • Flip-flops – sequential circuits • Complex gates – modules • Circuit design techniques • Assembly language programming CSC321

What We Can Do • Create digital systems • Interconnection of modules to accomplish a specific task • Through an appropriate set of modules and connections we can create a digital computer • Rather than show the circuits in all their glorious detail we use an abstract representation CSC321

Architectural Functional Block Diagram CSC321

So What? • A digital computer is a fascinating thing in and of itself but somewhat useless • It is the job of the programmer to make it do something useful • The programmer’s job is to supply specific, detailed instructions to move and manipulate binary data patterns within the architecture to accomplish a meaningful task CSC321

Sounds Easy • The problem is that we [the programmers] don’t want to be burdened with the knowledge of gates, registers, flip-flops, etc. • So, we describe the architecture in terms of various parameters useful to the programmer • Note that “the programmer” may not be an “applications programmer” – it may be a “language compiler writer”, for example CSC321

Descriptive Parameters • The set of registers within the architecture • The names and functions (uses) of the registers • The set of operations available for moving data between registers and manipulating data contained within registers • Microoperations • The method of specifying the sequence of execution of the microoperations • Note that this is a level lower than assembly language CSC321

Microoperations • To describe the operations we use a language called Register Transfer Language • We [as programmers] assume that the logic circuits [combinational and/or sequential] are available to perform the “transfers” CSC321

Register Transfer Language • A register is nothing but a small, fast piece of memory • A system for expressing in symbolic form the micro-operation sequences among the registers of a digital module • Note [again] that this is not Assembly Language!!! CSC321

Register Transfer Language(RTL) • Registers are designated by capital letters • MAR – Memory Address Register • PC – Program Counter • IR – Instruction Register • Rx – General purpose register • etc. • Bits within registers are numbered 0 to n-1 (n-bit register) starting at the LSB (rightmost bit) • What are registers made of? CSC321

7 6 5 4 3 2 1 0 15 7 0 0 R1 R2 15 8 7 0 R2(H) R2(L) Register Representations(Pictorial) R1 CSC321

R2 R1 Register Transfers • Move the data from one register to another • The bit pattern that is in register R1 is copied into register R2 • Again, we are assured that the circuitry required to perform the transfer is available • Implies a parallel load operation CSC321

if (P = 1) then R2 R1 Conditional Transfer • Conditionally move the data from one register to another • The bit pattern that is in register R1 is copied into register R2 if the control signal P is high (1) • This isn’t a Java “if/then” statement! • Again, we are assured that the circuitry required to perform the transfer is available • Implies a parallel load operation CSC321

P: R2 R1 Control Function • Conditionally move the data from one register to another • Same meaning as the if/then statement • P may be [typically is] a complex logic expression/combinational circuit CSC321

P: R2 R1 Control circuit P Load clock R2 n clock R1 load Hardware Implication • Rising edge of clock sets the load signal • Next rising edge cause the transfer to occur CSC321

P: R2 R1, R3 R0 Parallel Operations • Some microoperations take multiple clock cycles (periods) • Some microoperations can be performed simultaneously (in parallel) • During the same clock edge transition • It’s this kind of operation that distinguishes between computers and “super computers” CSC321

Data Paths • We’ve been assuming that the circuitry to perform the transfers exists • Two choices for realizing this assumption CSC321

3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 A3 A2 A1 A0 D3 D2 D1 D0 C3 C2 C1 C0 B3 B2 B1 B0 register D register C register B register A Data Paths • Lots and lots of little wires • Every register pair that can transfer data must be wired together • You would have to do this for all registers! CSC321

Data Paths • Common bus • A set of n wires (for n-bit register transfers) shared by all registers • Registers take turns putting their bit patterns onto the bus CSC321

4 x 1 MUX 4 x 1 MUX 4 x 1 MUX 4 x 1 MUX 3 3 3 3 2 2 2 2 1 1 1 1 0 0 0 0 3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0 Bus Implementation bit 3 bit 2 bit 1 bit 0 select 1 select 0 D3 C3 B3 A3 D2 C2 B2 A2 D1 C1 B1 A1 D0 C0 B0 A0 A3 A2 A1 A0 D3 D2 D1 D0 C3 C2 C1 C0 B3 B2 B1 B0 register D register C register B register A CSC321

Bus Implementation • Completing the transfer (we now have data bits from a register on the bus) • Simple – we just connect the bus data lines to the inputs of the registers • The data is then available to all registers on the bus • We activate the Load line for the actual destination register CSC321

BUS R1, R2 BUS R2 R1 Register Transfer Language • In long-hand: • In short-hand • Bus activation is implied CSC321

Three-State Gates • In constructing the bus we used multiplexers • Convenient but expensive in terms of size and money • An alternative is the three-state gate • Similar to the logic gates we’ve looked at so far (NOT, AND, OR, NAND, NOR, XOR) • Different in that they’re not binary CSC321

Three-State Gates • Three-state gates have a 3rd output value that corresponds to “no output” • When in this state the gate is effectively out of the circuit – it acts as if it isn’t even there • Technically, this is called a high-impedancestate and acts as an open circuit • You’ll also here these called tri-state gates CSC321

input output control Three-State Gates • The most common tri-state gate is the buffer • What’s a buffer? • What’s a tri-state buffer? CSC321

Tri-State Buffer Usage A0 bit 0 B0 from registers C0 D0 bus lines A3 bit 3 B3 from registers C3 D3 2 x 4 Decoder S1 0 Select S0 1 2 Enable E • 1 decoder • A bunch of buffers 3 CSC321

Read: R1 M[AR] Memory Transfers • Recall we must specify a direction (read/write), a source address, and a destination address • Read from memory location at address in the AR register (Address Register) and place the contents into the R1 register CSC321

Write: M[AR] R1 Memory Transfers • Write (copy) the contents of register R1 to the memory location at address in the AR register (Address Register) CSC321

R2 R1 + R3 R2 R1 - R3 R2 R1 R2 R1 + 1 R2 R2 + R1 + 1 R2 R1 + 1 R2 R1 - 1 Register Transfer Language (RTL)Arithmetic Operations Addition Subtraction Increment Decrement Complement (invert bits) Negate (2’s complement) Subtraction • We need circuits to do all these operations CSC321

S C S C Binary Adder Circuit • Recall there are two types of adder • Half adder • Adds two bits • Produces a sum and carry • Full adder • Adds three bits • Produces a sum and carry CSC321

B3 A3 B2 A2 B1 A1 B0 A0 Full Adder Full Adder Full Adder Full Adder C3 C2 C1 C0 Cout S3 S2 S1 S0 Creating Larger Adders • Connect full adders together • n-bit binary adder is created from n full adders 4-bit binary adder CSC321

B3 B0 B2 B1 A3 A2 A1 A0 M Full Adder Full Adder Full Adder Full Adder C3 C2 C1 C0 Cout S3 S2 S1 S0 Binary Subtractor • Subtraction is performed by a 2’s complement operation followed by an addition CSC321

A3 A2 A1 A0 1 Half Adder Half Adder Half Adder Half Adder C3 S3 S2 S1 S0 C2 C1 C0 Incrementer • Can use a binary adder with a 1 as the 2nd input • Can be done more simply with a series of half adders CSC321

Decrementer • Subtractor with a 1 at the 2nd input CSC321

Arithmetic Unit • We don’t want all these separate circuits in our system • Too much space, too much complexity, too much money • Can we combine all these operations in a single circuit? CSC321

0 Cin A0 S1 S0 B0 A1 B1 A2 B2 A3 B3 0 0 0 S0 S1 1 S0 S1 1 S0 S1 1 2 2 2 0 3 3 3 S0 S1 1 2 3 4x1 MUX 4x1 MUX 4x1 MUX 4x1 MUX Full Adder Full Adder Full Adder Full Adder D0 D1 D2 D3 Cout Arithmetic Unit CSC321 Note: MSB is on the right, LSB is on the left

0 Cin A0 S1 S0 B0 A1 B1 A2 B2 A3 B3 0 0 0 S0 S1 1 S0 S1 1 S0 S1 1 2 2 2 0 3 3 3 S0 S1 1 2 3 4x1 MUX 4x1 MUX 4x1 MUX 4x1 MUX Full Adder Full Adder Full Adder Full Adder D0 D1 D2 D3 Cout Select Lines Set To 00 CSC321

Summary CSC321

Where are we? • This takes us up to section 4-5 • Homework: • 4-1, 4-2, 4-3, 4-6, 4-7, 4-8 • Due next lecture CSC321

Where We’ve Been

Where We’ve Been

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