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Semiconductor computing platform challenges. S/W inertia. O/S limitations. reliability. feature set. performance. security. accelerators. power. cost. Reconfigurability. Microprocessors. Mem. Latency/Bandwidth Power Constraints. Intelligent RAM. DSP/ASIP. wire load. fab cost.
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Semiconductor computing platform challenges S/W inertia O/S limitations reliability feature set performance security accelerators power cost Reconfigurability Microprocessors Mem. Latency/Bandwidth Power Constraints Intelligent RAM DSP/ASIP wire load fab cost leakage process variation billion transistors
Powerful trends • Technology trends • Increasing speed, power variability of transistors limit clock frequency increase • Increasing interconnect delay and shrinking clock domains limit the size of individual computing engines. 1.4 10000 Interconnect RC Delay 1.3 30% 1000 Clock Period 1.2 Normalized Frequency 130nm 100 Delay (ps) Copper Interconnect 1.1 10 5X RC delay of 1mm interconnect 1.0 0.9 1 1 2 3 4 5 Normalized Leakage (Isb) 350 250 180 130 90 65 Source: Shekhar Borkar, Intel