Computer Organization & Design

1. Computer Organization & Design

2. Signed and Unsigned Numbers

3. Least Significant Bit is used to refer to the rightmost bit (bit 0 above) and most significant bit to the leftmost bit (bit 31). The MIPS word is 32 bits long, so we can represent 232 different 32-bit patterns. It is natural to let these combinations represent the numbers from 0 to 232 - I (4,294,967,295ten )

4. Represent numbers as strings of ASCII digits instead of as integers Computer programs calculate both positive and negative numbers, Solution is to add a separate sign which conveniently can be represented in a single bit The name for this representation is sign and magnitude.

5. Leading 0's mean positive, and leading I's mean negative. This convention for representing signed binary numbers is called two's complement representation

6. set of negative numbers: -2, I47,483,647 ten (1000 ... 000 Itwo) down to -I ten(1111........1111two)· H/W needs to test only this bit to see if a number is positive or negative (with a considered positive). This bit is often called the sign bit. By recognizing the role of the sign bit, we can represent positive and negative 32-bit numbers in terms of the bit value times a power of 2: The sign bit is multiplied by -231 , and the rest of the bits are then multiplied by positive versions of their respective base values.

8. signed and unsigned loads are identical. MIPS does offer two flavors of byte loads: load byte(lb) treats the byte as a signed number and thus sign-extends to fill the 24 leftmost bits of the register, load byte unsigned (lbu) works with unsigned integers. Since C programs almost always use bytes to represent characters rather than consider bytes as very short signed integers, lbu is used practically exclusively for byte loads. load half(lh) treats the halfword as a signed number and thus sign-extends to fill the 16 leftmost bits of the register, while load halfword unsigned (lhu) works with unsigned integers.

9. MIPS offers two versions of the set on less than comparison to handle these alternatives. Set on less than (slt) and set on less than immediate (slti) workwith signed integers. Unsigned integers are compared using set on less than unsigned (sltu) and set on less than immediate unsigned (sltiu).

10. The value in register $sO represents -1 if it is an integer and 4,294,967,295ten if it is an unsigned integer. The value in register $sl represents 1 in eithercase. Then register $t0 has the value 1, since -1ten < 1ten' and register $t1 has the value 0, since 4,294,967,295ten > Iten'

11. Addition and Subtraction

12. exception Also called interrupt. An unscheduled event that disrupts program execution; used to detect overflow. interrupt An exception that comes from outside of the processor. (Some architectures use the term interrupt for all exceptions.) An exception or interrupt is essentially an unscheduled procedure call. The address of the instruction that overflowed is saved in a register, and the computer jumps to a predefined address to invoke the appropriate routine for that exception. The interrupted address is saved so that in some situations the program can continue after corrective code is executed

13. MIPS includes a register called the exception program counter (EPC) to contain the address of the instruction that caused the exception. The instruction move from system control (mfc0) is used to copy EPC into a general-purpose register

14. Multiplication

15. I. Just place a copy of the multiplicand (1 X multiplicand) in the proper place If the multiplier digit is a 1 , or 2. Place 0 (0 X multiplicand) in the proper place if the digit is 0. Sequential Version of the Multiplication Algorithm and Hardware

20. Multiply in MIPS MIPS provides a separate pair of 32-bit registers to contain the 64-bit product, called Hi and Lo. To produce a properly signed or unsigned product, MIPS has two instructions: multiply (mult) and multiply unsigned (multu). To fetch the integer 32-bit product, the programmer uses move from lo (mflo). The MIPS assembler generates a pseudoinstruction for multiply that specifies three general purpose registers, generating mflo and mfhi instructions to place the product into registers.

21. Faster Multiplication one input is the multiplicand ANDed with a multiplier bit and the other is the output of a prior adder. Division dividend A number being divided. divisor A number that the dividend is divided by. quotient The primary result of a division; a number that when multiplied by the divisor and added to the remainder produces the dividend.

22. remainder The secondary result of a division; a number that when added to the product of the quotient and the divisor produces the dividend.

23. The two operands (dividend and divisor) and the result (quotient) of divide are accompanied by a second result called the remainder. Dividend = Quotient X Divisor + Remainder

27. We start with the 32-bit Quotient register set to 0. Each iteration of the algorithm needs to move the divisor to the right one digit, so we start with the divisor placed in the left half of the 64-bit Divisor register and shift it right 1 bit each step to align it with the dividend.The Remainder register is initialized with the dividend.

28. It must first subtract the divisor in step 1; remember that this is how we performed the comparison in the set on less than instruction. If the result is positive, the divisor was smaller or equal to the dividend, so we generate a 1 in the quotient (step 2a). If the result is negative, the next step is to restore the original value by adding the divisor back to the remainder and generate a 0 in the quotient (step 2b). The divisor is shifted right and then we iterate again.

29. instruction format A form of representation of an instruction composed of fields of binary numbers.

30. Floating Point Examples of Real Numbers A number in scientific notation that has no leading 0s is called a normalized number, which is the usual way to write it. For example, 1.0 X 10-9 is in normalized scientific notation 0.l ten X 10-8 and 10.0 X 10-10 are not

31. Floating-Point Representation Fraction The value, generally between 0 and 1, placed in the fraction fIeld. Exponent In the numerical representation system of floating- point arithmetic, the value that is placed in the exponent field. In MIPS

32. where s is the sign of the floating-point number (I meaning negative), exponent is the value of the 8-bit exponent field (including the sign of the exponent), and fraction is the 23-bit number. This representation is called sign and magnitude, since the sign has a separate bit from the rest of the number.

34. Floating point formats are the part of the IEEE 754 floating-point standard, found in virtually every computer invented since 1980 Leading 1 bit of normalized binary numbers implicit Hence, the number is actually 24 bits long in single precision (implied 1 and a 23-bit fraction), and 53 bits long in double precision (1 + 52). To be precise, we use the term significand to represent the 24- or 53bit Number that is 1 plus the fraction, and fraction when we mean the 23- or 52-bit number. Since 0 has no leading 1, it is given the reserved exponent value 0 so that the hardware won't attach a leading 1 to it Use the term significand to represent the 24- or 53bit number that is 1 plus the fraction, and fraction when we mean the 23- or 52-bit number. Since 0 has no leading 1

35. Finite numbers, which may be either base 2 (binary) or base 10 (decimal). Each finite number is most simply described by three integers: s= a sign (zero or one), c = a significand (or 'coefficient'), q = an exponent. The numerical value of a finite number is (−1)s × c × bq If we number the bits of the fraction from left to right s 1, s2, s3, ... , then the value is

36. 1.0 X 2-1 would be represented as 1.0 X 2+1 would be represented as

37. IEEE 754 uses a bias of 127 for single precision, so -I is represented by the bit pattern of the value - I + 12710 or I2610 = 0111 1110two and +I is represented by I + 127, or I 28 = 1000 0000 Biased exponent means that the value represented by a floating-point number is really The exponent bias for double precision is 1023.

44. Floating Point Multiplication

49. Datapath and Control in the Processor core MIPS instruction set: • The memory-reference instructions load word (lw) and store word (sw) • The arithmetic-logical instructions add, sub, and, or, and slt • The instructions branch equal (beq) and jump (j)