Being Globally Energy-Aware in DSP Systems Design

1. SIPS 2009 Tampere Being Globally Energy-Aware in DSP Systems Design Chong-Min Kyung KAIST

2. Outline • Introduction • Difficulties of Energy Optimization • Many Global Views • Dealing with Uncertainties • Complexity, Distortion and Rate Optimization • Conclusion

3. Outline • Introduction • Energy, as a new metric in DSP design • Why Globally Energy-Aware? • Difficulties of Energy Optimization • Many Global Views • Dealing with Uncertainties : • Complexity, Distortion and Rate Optimization • Conclusion

4. Traditional DSP Design ; fast, accurate, and cheap • Performance (Throughput, Latency) • vs. energy • Accuracy of computation • vs. accuracy of transmission • Cost of manufacturing • vs. cost of operation • vs. cost of maintenance • vs. cost of environment

5. Weight shift in DSP Design toward Energy • Performance (Throughput, Latency) • vs. energy consumption • Accuracy of computation • vs. accuracy of transmission • Cost of manufacturing • vs. cost of operation • vs. cost of maintenance • vs. cost of environment

6. Three Issues on introducing Energy • Issue of design target shift : Energy or Information, which is cheaper to deploy? • Issue of currency ratio between energy and information : Dealing with abundance of unnecessary data by maximizing ‘information per energy’ • Issue of global objective function

7. Energy ;a new metric in DSP Design • Issue 1 : Energy vs. Information, which is cheaper to deploy? • Energy is consumed for information deployment ; physical endeavor is needed for energy deployment. • Industrial Revolution Age : Iron (information) is processed where coal (energy) is cheaper. • ‘Energy consumption’ as a new design metric

8. Energy ;a new metric in DSP Design • Issue 2 : excessive unnecessary data • save energy by claiming performance /accuracy only as much as needed • Why waste energy for unnecessary information?

9. Energy ; a new metric in DSP Design • Issue 3 : Composite cost function • Consider energy for communication as well as processing • Do not process what cannot be sent. • Process information such that the composite cost is minimal. • Price of energy depends on the its location as well as its form.

10. Why Globally Energy-Awarein Design ? • Various forms of considering energy consumption during the design process • Low-energy design • Energy-scalable design • Energy-aware design : run-time, self-adjusting

11. WhyGloballyEnergy-Aware in Design ? • Global vs. Local ; Questions to ask • Looking for a long-term solution? • Is Design Platform/Approach (for global energy awareness) needed?

12. Cost of communication vs. Cost of processing • Various forms of data for transmission • Raw data • Compressed data • Feature-extracted data • Recognition/decision

13. Cost of communication vs. Cost of processing • ‘Use Energy as much as Information processing requires’ vs. ‘Process I such (where, how) that E consumption is minimal’ • Trade-off between • amount of cost (energy, area, latency, design time) and • amount of profit (saved energy, bandwidth) Cost of Energy Communication Computing Raw Compressed Feature Decision Form of Information

14. Outline • Introduction • Difficulties of Energy Optimization • Many Global Views • Dealing with uncertainties : • Complexity, Distortion and Rate Optimization • Conclusion

15. Difficulties of Energy Minimization • Energy minimization problem • Contexts as constraints • Performance (throughput, latency) • Cost (chip area, code size) • Output quality (error, distortion) • Variables ; too many • Uncertainty, variability

16. Difficulties of Energy Minimization • Too many variables in different function blocks affecting the objective function channel coding block mode, search range resolution, frame rate Transmitter ECC H.264 encoder + alarm generator Camera Storage

17. Difficulties of Energy Minimization • Dealing with uncertainty/variability • Manufacturing tolerance • Input statistics, run time variation • Environment • Temperature • Supply voltage • Demand on QoS varies (is often negotiable) according to the remaining energy

18. Outline • Introduction • Difficulties of Energy Optimization • Many Global Views • ChipLife Cycle View • System Operation Cycle View • Chip Design Cycle View • System Architecture Option View • Circuit-Battery System View • Dealing with uncertainties : • Complexity, Distortion and Rate Optimization • Conclusion

19. Chip Life Cycle View Dirty gas, chemical, used mask out-signal design fabrication test operation designer ‘s time power(energy) in-signal test vector clean gas, chemical, mask Energy

20. System Operation Cycle View • Control variables : spatial/temporal resolution, precision, parameter of algorithm, … Stage i Sampling ADC Processing Storage Transmission ti : exec. time ei : energy di : distortion cost Performance, or output quality Minimize E + 1D + 2T

21. Total Cost Minimization Problem Sampling ADC Processing Storage Transmission Stage i SIPS, Tampere

22. Graded Cascade System • How to decide ei and di? • ei-1 • di-1 • ti-1 ei di ti • ei+1 • di+1 • ti+1 D-1 (PSNR) Energy Time • ei

23. Graded Cascade System : examples • Cache/memory hierarchy • Alarm control system • Any hierarchical human organization

24. Chip Design Cycle View • High-level : hierarchical view 1) General-purpose case • Architecture/compiler co-design 2) Application-specific case (platform-based) • Energy-aware algorithm/architecture co-design • Low-level : both general- and application- specific case • DVFS (Dynamic Voltage Frequency Scaling) • Power gating

25. a video surveillance sensor node d t e Silent Resolution ↑ Bits per pixel ↑ Resolution ↑↑ Bits per pixel ↑↑ Frame rate ↑↑ Frame rate ↓ Bits per pixel ↓ Inter prediction RDO off DVFS Inter prediction RDO off DVFS Intra prediction RDO off Power gating Inter prediction RDO on Fast mode decision

26. System Architecture Option View • Simulation for minimal energy consumption with performance/deadline constraint based on behavior/energy model for each implementation of each block • Single / multi-core (with accelerator ?) • Interconnection architecture • bus / network • Memory system • Implementation • SoC • SiP (system in a package) • 3D IC (3-dimensional IC)

27. Circuit(Load)-Battery System View • Considering overall energy consumption from a energy provider (battery) point • Battery-aware task scheduling • DC/DC converter efficiency variation

28. Battery-aware task scheduling • Battery lifetime is dependent on the load current pattern. Charge recovery Energy consumption at load is the same!! But, charge consumption at battery is different.  B case is better than A case w.r.t. battery charge consumption point. A Battery fail B

29. Reducing DC/DC converter loss • DC/DC converter loss • Function of input voltage and output current Battery voltage degradation  Converter efficiency improvement Alkaline AA cell 3 series voltage *TI TPS60100 efficiency (%)

30. Outline • Introduction • Difficulties of Energy Optimization • Many Global Views (Big Pictures) • Dealing with uncertainties : • Uncertainty-Aware Energy Optimization • Complexity, Distortion and Rate Optimization • Conclusion

31. Energy Optimization with Uncertainties • Technology≥ 130nm • Switching power consumption  Dynamic supply voltage/frequency scaling • 65nm ≤ Technology≤ 90nm • Sub-threshold leakage current • Adaptive body biasing and power gating • Technology ≤ 45nm • Gate leakage current  High-k/metal gate • Variability  adaptive body bias control

32. Where Uncertainty Comes from (1) • PVT variation ; from device, environment • Process • Voltage • Temperature [Source: Scott Thomson, U Florida]

33. Where Uncertainty Comes from (2) • Workload variation : from application • Data dependency # of loop iterations, etc. • Control-flow dependency : if/else statement, etc. • Architectural dependency : cache hit/miss, DDR page miss, etc. [source: MPEG4 for decoding movie clip, Harry Potter, using LG XNOTE LW25]

34. Uncertainty-Aware Optimization • How to deal with the workload variation • Conservative approach: worst-case prediction • Aggressive approach: average value prediction • Stochastic approach Prob. Workload Predicted Workload Requirements (e.g., deadline) Environment (e.g., temperature, hardware system) Stochastic workload predictor

35. Workload Uncertainty-Aware DVFS • DVFS (dynamic voltage frequency scaling) • Case study: MPEG4, H.264 decoder • Source of workload variation • Frame type: I/P/B-frame • Amount of motion • Configuration: quantization, frame rate, image size, etc. • Stochastic DVFS • Set voltage/freq. level is set based on predicted workload.

36. Example Motion Compensation Deblocking Filter High freq. High freq. Conservative Approach Freq. Aggressive Approach Stochastic Approach Time

37. Outline • Introduction • Difficulties of Energy Optimization • Many Global Views (Big Pictures) • Dealing with uncertainties : • Complexity, Distortion and Rate Optimization • Conclusion

38. CRD Optimization • Cost • Rate • Distortion

39. R, D first : Rate and Distortion • Definition • Rate : Energy needed for storage and transmission • Distortion: 1/SNR • How to reduce distortionat low data rate? • Transmission : Speed, Accuracy • Storage : Space, Accuracy

40. Compression? • What is compression? • Reduce the load with least loss using as little resource as possible • in transmission : bandwidth, energy • in storage : storage capacity requirement, energy • Compression in lower level • Anti-aliasing filtering • Sampling • A/D conversion

41. R + D, or RD as objective function • Sampling ← kind of compression (in time) • Distortion S·∆t (S: signal slope) • Rate (number of sample) = • R · D = S·T uncertainty product • Non-uniform sampling : how to assign sampling points ∆ ∆ = = s∆t s : signal slope ∆t Slope-aware sampling Variable-rate sampling i i+1

42. A/D conversion : kind of compression • Figure of merit • Distortion = Rate ( # of bits/sample) = N • R·D = ∆ = D + ∆ investment in chip area power(energy) design time R

43. CRDOptimization • Code compression • Code expansion Compression Code Cost - Execution time - Energy - Chip area SNR / Rate Handling energy ECC Channel/Source Coding Code Cost • Execution time • Energy • - Chip area Error rate-1/ code size Handling energy

44. CRDOptimization • CRD model for chip design Design Cost Chip - Cost (design man months) Performance / Area or Power

45. CDOptimization : test, recognition • CD model decision (rate is constant) Test Tested chip Cost (Testing time) Error-1 Pattern recognition Decision Cost (processing time) Error-1

46. CRD Optimizationin H.264/AVC Candidate modes Candidate modes High-complexity RDO Entropy coding Generate bit sequences Low-complexity RDO Choose the min. J Choose the min. J’ Entropy coding Entropy coding Generate bit sequences PSNR  Entropy coding Low-complexity RDO (pseudo-rate) High-complexity RDO rate

47. CRD Optimizationin H.264/AVC Candidate modes 2) 1) Reducing # of cand. modes 2) Reducing entropy coding time thru an efficient rate model High-complexity RDO Entropy coding Low-complexity RDO Choose the min. J Entropy coding 1) Generate bit sequences PSNR  Entropy coding High-complexity RDO rate

48. CRDO in Wireless Transmission • Encoding power vs. Transmission power maximum encoding power Power Total power Transmission power Optimal encoding power Encoding power Minimum encoding bit rate Optimal bit rate Bit-rate

49. Outline • Introduction • Difficulties of Energy Optimization • Many Global Views (Big Pictures) • Dealing with uncertainties : • Complexity, Distortion and Rate Optimization • Conclusion

50. Conclusion • Energy consumption must be considered • In the design process • In a ‘globally energy-aware’ manner • Being ‘Globally Energy-Aware’ includes considering • Life cycle, design cycle, operation cycle of DSP chip, as well as • Dealing with variability, and finally… • Run-time CRD optimization • Complexity (computing energy) • Rate (transmission energy) • Distortion (quality of processing results)