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Lab 6 EGR 262 – Fundamental Circuits Lab. 1. EGR 262 Fundamental Circuits Lab Presentation for Lab #6 Improved Digital-to-Analog Converter. Instructor: Paul Gordy Office: H-115 Phone: 822-7175 Email: PGordy@tcc.edu. Lab 6 EGR 262 – Fundamental Circuits Lab. 2.
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Lab 6 EGR 262 – Fundamental Circuits Lab 1 EGR 262 Fundamental Circuits Lab Presentation for Lab #6 Improved Digital-to-Analog Converter Instructor: Paul Gordy Office: H-115 Phone: 822-7175 Email: PGordy@tcc.edu
Lab 6 EGR 262 – Fundamental Circuits Lab 2 • Lab #4 • DAC built using an R-2R ladder network • 3 bits of precision (23= 8analog output levels) • 3 Arduino UNO outputs required • VR = 0 • Lab #5 • DAC built using PWM • 8 bits of precision (28= 256 analog output levels) • 1 Arduino UNO output required • VR = 5V (or potentially hundreds of %) • Lab #6 • DAC built using a PWM signal to charge a capacitor to the desired analog level • The average capacitor voltage is proportional to the duty cycle • 8 bits of precision (28 = 256 analog output levels) • 1 Arduino UNO output required • DAC will be designed for max VR= 10%
Lab 6 EGR 262 – Fundamental Circuits Lab 3 RC Circuits Recall from EGR 271 the responses for charging and discharging capacitor voltages: Charging capacitor: v(t) Vx t 0 5 = 5RC 0 Discharging capacitor: v(t) Vx t 0 5 = 5RC 0
Lab 6 EGR 262 – Fundamental Circuits Lab 4 Time to charge or discharge a capacitor The time to charge or discharge a circuit is often expressed in terms of (tau), the “time constant” for the circuit. For an RC circuit, = RC. The approximate time to fully charge or fully discharge a capacitor is 5 = 5RC. Note that v(5 ) = Vx(1-e-t/RC) = Vx(1-e-5RC/RC) =Vx(1-e-5) = 0.993Vx, so the capacitor is 99.3% charged at 5. Example: If R = 1 kΩ and C = 100 pF, determine the time to fully charge or fully discharge the capacitor. 5 = 5RC = 5(103)(100 x 10-12) = 5 x 10-7 = 0.5 us
Lab 6 EGR 262 – Fundamental Circuits Lab 5 Charging a capacitor with an initial voltage, Vo In general the complete response to an RC circuit with DC sources has the form: If the capacitor has an initial voltage Vo and charges to the source voltage Vx as shown below, then B and A can be evaluated using the values of v(t) at t = 0 and t = : v() = Vx = B + Ae- = B v(0) = Vo = B + Ae0 = B + A, so A = Vo – Vx so v(t) = B + Ae-t/RC = v() + [v(0) - v()]e-t/RC or v(0) = Vo v(t) v(t) = Vx + [Vo – Vx]e-t/RC Vx Vo t 0 5 = 5RC 0 v(t) = B + Ae-t/RC v(t) = Vx + [Vo – Vx]e-t/RC
Lab 6 EGR 262 – Fundamental Circuits Lab 6 RC Circuit Response to a PWM signal In the RC circuit shown, the capacitor will charge when the PWM signal is Vx and discharge when the PWM signal is 0V. If the PWM pulse width and period are large enough, the capacitor may fully charge and fully discharge. PWM signal Vx 0V t 2T T1 T + VC _ R PWM signal C charges VC C C discharges Vx 0V t T1 2T T
Lab 6 EGR 262 – Fundamental Circuits Lab 7 v(t) V1 V0 T 2T 0 3T 4T Determining the RC Circuit Response to a PWM signal If 5RC is large compared to the period of the PWM signal, the capacitor will only discharge a small amount between pulses as illustrated below. The capacitor will quickly reach a point where it charges and discharges between V1 and V0. Since the initial change in an exponential response is almost linear, the charging and discharging capacitor voltage resembles a “saw tooth” waveform as shown below. 3T VC Vx 0V t The ripple voltage is often expressed as a percentage of the mean, or average, voltage. Example: If VDC= 10V, and VR= 0.5V, then the ripple voltage is VR/VDC*100 = 5%. 2T T
Lab 6 EGR 262 – Fundamental Circuits Lab 8 Comparing Labs 4-6 In Lab 6 we will add an RC circuit to a PWM output and will be able to reduce the ripple significantly (we will design it for 10% max ripple voltage). V0 = DC value (no ripple) Lab 4 t Arduino UNO Arduino UNO Lab 4: 3-bit R-2R DAC – only 8 analog values, but VR = 0. Used 3 outputs on the Arduino. Lab 5: 6-bit DAC – 256 analog values, but VR = 5V (or hundreds of percent in some cases). Used 1 output on the Arduino. Lab 6: 6-bit DAC – 256 analog values designed for VR = 10% max. Uses 1 output on the Arduino. D11 D11 Arduino UNO D13 V0= analog output V0 = analog output (PWM) 2R R Lab 5 D12 2R R V0 = analog output (PWM) D11 R 2R C 2R Lab 6 t t
Lab 6 EGR 262 – Fundamental Circuits Lab 9 Determining expressions for VDC and VR The sawtooth waveform previously shown is illustrated again with expressions for the charging and discharging capacitor voltage added. Determine expressions for VDC and VR in terms of R, C, T1, and T. v(t) V1 V0 0 T1 0 T
Lab 6 EGR 262 – Fundamental Circuits Lab 10 Solving the two simultaneous expressions for V1 and V0 yields: and substitute these into the expressions for VDCand VRto show that: Note that Vx = 5V for the Arduino UNO.
Lab 6 EGR 262 – Fundamental Circuits Lab 11 Determine VDCand VRas a function of RC Recall that Arduino UNO PWM signals use f = 490 Hz, so T = 1/f = 2.04ms If D = 0.5 (50% duty cycle), then T1 = 0.5T = 1.02 ms. Substituting for T, T1, and Vx (5V) in Eq. 5-6 yields:
Lab 6 EGR 262 – Fundamental Circuits Lab 12 Selecting RC for the desired maximum % ripple voltage Different values for RC can be substituted into Equations 7-8 to determine VDC, VR, and % ripple. As part of the Pre-Lab work for this lab, you will use Excel to calculate VDC and VR (using Eq 7-8) as RC varies from 1ms to 20ms. Also calculate % ripple (= VR/VDC*100). Suppose we want to have a maximum of 10% ripple? The table below should show that 10% ripple occurs when RC 0.010 = 10ms. 10% ripple should occur for RC 0.010
Lab 6 EGR 262 – Fundamental Circuits Lab 13 Determining Vm as a function of duty cycle How does VDC vary with duty cycle? Exponentially? Linearly? Let’s see: Using the result from the last table (RC = 0.01), using T = 0.00204, and using T1 = DT = 0.00204D, Equations 5-6 become:
Lab 6 EGR 262 – Fundamental Circuits Lab 14 VDC VR 5V 0V 0 D D 100% 100% 0% 0% Determining Vm as a function of duty cycle If Excel is used to calculate and graph VDC as D varies from 0 to 1 (another Pre-Lab task), the result is important: The DC (or analog) voltage varies linearly with the duty cycle! This means that our DAC will have equal voltage increments in voltage (a desirable feature) as we vary the digital input. Graphing VR vs D will show that maximum ripple voltage occurs at 50%. 50%