1 / 78

EEL 3705 / 3705L Digital Logic Design

EEL 3705 / 3705L Digital Logic Design. Fall 2006 Instructor: Dr. Michael Frank Module #5: Combinational Logic Optimization (Thanks to Dr. Perry for the slides). Wednesday, October 4, 2006. Administrivia: Midterm #1 grades posted, handing papers back today

tarantinom
Download Presentation

EEL 3705 / 3705L Digital Logic Design

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. EEL 3705 / 3705LDigital Logic Design Fall 2006Instructor: Dr. Michael FrankModule #5: Combinational Logic Optimization(Thanks to Dr. Perry for the slides) M. Frank, EEL3705 Digital Logic, Fall 2006

  2. Wednesday, October 4, 2006 • Administrivia: • Midterm #1 grades posted, handing papers back today • Averages: 96%, 89%, 96% (98.5 points overall) • This week’s lab: • “Top secret code display” (w. K-maps) • Design project #1: Due this Friday!! • Test your designs at end of lab period, or in TA office hours • Don’t delay writing the large required amount of documentation! • Homework assignment #3: To be posted very soon, watch for it. • Plan for today: • Go over midterm solutions briefly • Start in on next lecture topic, 3.5: • Techniques for Combinational Logic Optimization • Emphasis on use of Karnaugh maps M. Frank, EEL3705 Digital Logic, Fall 2006

  3. Topic 3.5: Techniques for Combinational Logic Optimization M. Frank, EEL3705 Digital Logic, Fall 2006

  4. Topic 3.5 – Minimizing Circuits Subtopics: • 3.5.1. Simplification using Boolean identities • Not covering in depth this semester in lecture • 3.5.2. Karnaugh Maps (CIO #5) • Focus of this lecture • 3.5.3. Don’t care conditions • 3.5.4. The Quine-McCluskey Method M. Frank, EEL3705 Digital Logic, Fall 2006

  5. Goals of Circuit Minimization • (1) Minimize the number of primitive Boolean logic gates needed to implement the circuit. • Ultimately, this also roughly minimizes the number of transistors, the chip area, and the cost. • Also roughly minimizes the energy expenditure • among traditional irreversible circuits. • This will be our focus. • (2) It is also often useful to minimize the number of combinational stages or logical depth of the circuit. • This roughly minimizes the delay or latency through the circuit, the time between input and output. • Note: Goals (1) and (2) are often conflicting! • In the real world, a designer may have to analyze and optimize some complex trade-off between logic complexity and latency. M. Frank, EEL3705 Digital Logic, Fall 2006

  6. Minimizing DNF Expressions • Using DNF (or CNF) expressions guarantees that you can always find some circuit that implements any desired Boolean function. • However, the resulting circuit may be far larger than is really required! • We would like to find the smallest sum-of-products expression that is equivalent to a given function. • This will yield a fairly small circuit. • However, circuits of other forms (not either CNF or DNF) might be even smaller for complex functions. M. Frank, EEL3705 Digital Logic, Fall 2006

  7. Chapter 3 Simplification of Switching Functions M. Frank, EEL3705 Digital Logic, Fall 2006

  8. Karnaugh Maps (K-Map) A K-Map is a graphical representation of a logic function’s truth table M. Frank, EEL3705 Digital Logic, Fall 2006

  9. Relationship to Venn Diagrams M. Frank, EEL3705 Digital Logic, Fall 2006

  10. Relationship to Venn Diagrams M. Frank, EEL3705 Digital Logic, Fall 2006

  11. Relationship to Venn Diagrams a b M. Frank, EEL3705 Digital Logic, Fall 2006

  12. Relationship to Venn Diagrams a b M. Frank, EEL3705 Digital Logic, Fall 2006

  13. Relationship to Venn Diagrams M. Frank, EEL3705 Digital Logic, Fall 2006

  14. Two-Variable K-Map M. Frank, EEL3705 Digital Logic, Fall 2006

  15. Three-Variable K-Map Note: The bit sequences must alwaysbe ordered using a Gray code! M. Frank, EEL3705 Digital Logic, Fall 2006

  16. Three-Variable K-Map Note: The bit sequences must always be ordered using a Gray code! M. Frank, EEL3705 Digital Logic, Fall 2006

  17. Three-Variable K-Map Note: The bit sequences must always be ordered using a Gray code! Edges are adjacent M. Frank, EEL3705 Digital Logic, Fall 2006

  18. Four-variable K-Map Note: The bit sequences must be ordered using a Gray code! Note: The bit sequences must be ordered using a Gray code! M. Frank, EEL3705 Digital Logic, Fall 2006

  19. Four-variable K-Map M. Frank, EEL3705 Digital Logic, Fall 2006

  20. Four-variable K-Map Edges are adjacent Edges are adjacent M. Frank, EEL3705 Digital Logic, Fall 2006

  21. Plotting Functions on the K-map SOP Form M. Frank, EEL3705 Digital Logic, Fall 2006

  22. Canonical SOP Form Three Variable Example using shorthand notation M. Frank, EEL3705 Digital Logic, Fall 2006

  23. Three-Variable K-Map Example Plot 1’s (minterms) of switching function 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  24. Three-Variable K-Map Example Plot 1’s (minterms) of switching function 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  25. Four-variable K-Map Example 1 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  26. Karnaugh Maps (K-Map) Simplification of Switching Functions using K-MAPS M. Frank, EEL3705 Digital Logic, Fall 2006

  27. Terminology/Definition • Literal • A variable or its complement • Logically adjacent terms • Two minterms are logically adjacent if they differ in only one variable position • Ex: and m6 and m2 are logically adjacent Note: Or, logically adjacent terms can be combined M. Frank, EEL3705 Digital Logic, Fall 2006

  28. Terminology/Definition • Implicant • Product term that could be used to cover minterms of a function • Prime Implicant • An implicant that is not part of another implicant • Essential Prime Implicant • A prime implicant that covers at least one minterm that is not contained in another prime implicant • Cover • A minterm that has been used in at least one group M. Frank, EEL3705 Digital Logic, Fall 2006

  29. Guidelines for Simplifying Functions • Each square on a K-map of n variables has n logically adjacent squares. (i.e. differing in exactly one variable) • When combing squares, always group in powers of 2m , where m=0,1,2,…. • In general, grouping 2m variables eliminates m variables. M. Frank, EEL3705 Digital Logic, Fall 2006

  30. Guidelines for Simplifying Functions • Group as many squares as possible. This eliminates the most variables. • Make as few groups as possible. Each group represents a separate product term. • You must cover each minterm at least once. However, it may be covered more than once. M. Frank, EEL3705 Digital Logic, Fall 2006

  31. K-map Simplification Procedure • Plot the K-map • Circle all prime implicants on the K-map • Identify and select all essential prime implicants for the cover. • Select a minimum subset of the remaining prime implicants to complete the cover. • Read the K-map M. Frank, EEL3705 Digital Logic, Fall 2006

  32. Example • Use a K-Map to simplify the following Boolean expression M. Frank, EEL3705 Digital Logic, Fall 2006

  33. Three-Variable K-Map Example Step 1:Plot the K-map 1 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  34. Three-Variable K-Map Example Step 2:Circle ALL Prime Implicants 1 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  35. Three-Variable K-Map Example Step 3: Identify Essential Prime Implicants PI EPI PI 1 1 EPI 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  36. Three-Variable K-Map Example Step 4: Select minimum subset of remaining Prime Implicants to complete the cover. PI EPI 1 1 EPI 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  37. Three-Variable K-Map Example Step 5: Read the map. 1 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  38. Solution M. Frank, EEL3705 Digital Logic, Fall 2006

  39. Example • Use a K-Map to simplify the following Boolean expression M. Frank, EEL3705 Digital Logic, Fall 2006

  40. Three-Variable K-Map Example Step 1:Plot the K-map 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  41. Three-Variable K-Map Example Step 2:Circle Prime Implicants Wrong!! We really should draw A circle around all four 1’s 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  42. Three-Variable K-Map Example Step 3: Identify Essential Prime Implicants EPI EPI Wrong!! We really should draw A circle around all four 1’s 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  43. Three-Variable K-Map Example Step 4: Select Remaining Prime Implicants to complete the cover. EPI EPI 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  44. Three-Variable K-Map Example Step 5: Read the map. 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  45. Solution Since we can still simplify the function this means we did not use the largest possible groupings. M. Frank, EEL3705 Digital Logic, Fall 2006

  46. Three-Variable K-Map Example Step 2:Circle Prime Implicants Right! 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  47. Three-Variable K-Map Example Step 3: Identify Essential Prime Implicants EPI 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  48. Three-Variable K-Map Example Step 5: Read the map. 1 1 1 1 M. Frank, EEL3705 Digital Logic, Fall 2006

  49. Solution M. Frank, EEL3705 Digital Logic, Fall 2006

  50. Special Cases M. Frank, EEL3705 Digital Logic, Fall 2006

More Related