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Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)

Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [IEEE 802.15.4b High Rate Alt-PHY proposals - Further Performance Comparison] Date Submitted: [16 Nov, 2004] Source: [Francois Chin] Company: [Institute for Infocomm Research, Singapore]

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Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)

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  1. Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [IEEE 802.15.4b High Rate Alt-PHY proposals - Further Performance Comparison] Date Submitted: [16 Nov, 2004] Source: [Francois Chin] Company: [Institute for Infocomm Research, Singapore] Address: [21 Heng Mui Keng Terrace, Singapore 119613] Voice: [65-6874-5687] FAX: [65-6774-4990] E-Mail: [chinfrancois@i2r.a-star.edu.sg] Re: [Response to the call for proposal of IEEE 802.15.4b, Doc Number: 15-04-0239-00-004b] Abstract: [This presentation compares all proposals for the IEEE802.15.4b PHY standard.] Purpose: [Proposal to IEEE 802.15.4b Task Group] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Francois Chin, Institute for Infocomm Research (I2R)

  2. Background • Main contribution of current doc is to provide further simulation results based on 1000 channel realisation, for the PHY proposals using coherent detection • Previous comparison used 100 channel realisation, as in IEEE Doc 15-04-0507-04-004b • Performance comparison herein done with • {0,1,2} cyclic chip extension • {1,2,3} RAKE fingers Francois Chin, Institute for Infocomm Research (I2R)

  3. Updates • Corrected 3-RAKE multipath performance for all proposals (due to programme bug in previous version) • Included PSSS performance with Precoding • Determined RMS Delay Spread threshold below which cyclic chip extension is not necessary • Include 868 MHz multipath performance with raised cosine filter (roll-off factor = 0.2) • Include PER performance curves • 915MHz Transmit PSD for COBI-16 & 868MHz Transmit PSD for COBI-8 & PSSS • Stated Recommendation based on realistic channel RMS delay spread, achievable Transmit PSD and PER performance Francois Chin, Institute for Infocomm Research (I2R)

  4. Candidates for Multipath Performance Comparison (using Coherent Chip Despreading) • Source: 15-04-0507-04-004b Francois Chin, Institute for Infocomm Research (I2R)

  5. System Parameters for low GHz Bands Francois Chin, Institute for Infocomm Research (I2R)

  6. Comparison Methodology • Multipath robustness performance • Investigation done with • Zero, one and two Cyclic chip(s) extension • One, two & three RAKE fingers • Bandwidth efficiency (bps / Hz) • RF requirement • Memory requirement Francois Chin, Institute for Infocomm Research (I2R)

  7. Multipath Realisations 1000 Channel Realisations at each RMS Delay Spread Francois Chin, Institute for Infocomm Research (I2R)

  8. Multipath Realisations 1000 Channel Realisations at each RMS Delay Spread Francois Chin, Institute for Infocomm Research (I2R)

  9. Proposed Symbol-to-Chip Mapping (8-chip Code Set C8) The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

  10. Other Root Sequences (8-chip C8for Coherent Despreading only) • The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 9 18 23 29 33 36 46 58 66 71 72 92 111 113 116 123 132 139 142 144 163 183 184 189 197 209 219 222 226 232 237 246 Francois Chin, Institute for Infocomm Research (I2R)

  11. Decimal Symbol Binary Symbol Chip Values 0 0 0 0 0 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 2 0 1 0 0 0 0 0 0 0 1 1 1 0 1 1 1 0 1 1 1 3 1 1 0 0 0 1 0 1 0 0 1 0 0 0 1 0 0 0 1 0 4 0 0 1 0 0 0 1 1 1 0 1 1 0 1 0 0 1 0 1 1 5 1 0 1 0 0 1 1 0 1 1 1 0 0 0 0 1 1 1 1 0 6 1 1 1 0 0 0 0 0 1 0 0 0 0 1 1 1 1 0 0 0 7 0 1 1 1 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 1 8 0 0 0 1 0 0 1 1 0 1 0 0 1 0 1 1 1 0 1 1 9 1 0 0 1 0 1 1 0 0 0 0 1 1 1 1 0 1 1 1 0 10 0 1 0 1 0 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 11 1 1 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 1 0 1 12 0 0 1 1 0 0 1 1 1 0 1 1 1 0 1 1 0 1 0 0 13 1 0 1 1 0 1 1 0 1 1 1 0 1 1 1 0 0 0 0 1 14 0 1 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 1 15 1 1 1 1 0 1 0 1 1 1 0 1 1 1 0 1 0 0 1 0 DSSS Sequence E16 • Source doc.: IEEE 802.15-04-0314-02-004b Francois Chin, Institute for Infocomm Research (I2R)

  12. PSSS Sequence F31 (15 bit/32 chip) • Source doc.: IEEE 802.15-04-0121-04-004b Francois Chin, Institute for Infocomm Research (I2R)

  13. Proposed Symbol-to-Chip Mapping (16-chip Code Set G16) The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

  14. Other Root Sequences (8-chip G16for Coherent Despreading only) • The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 1915 3566 12115 21038 22715 31238 34297 42820 44497 53420 61969 63620 Francois Chin, Institute for Infocomm Research (I2R)

  15. Multipath Performance (COBI 16-chip) @ 1Mcps using O-QPSK For 16-chip COBI Sequence, No cyclic chip is needed when 3 RAKE is used. Francois Chin, Institute for Infocomm Research (I2R)

  16. Multipath Performance (COBI 8-chip) For 8-chip COBI Sequence, 1 Chip Extension is needed even with 3-RAKE, due to weaker despreading strength (shorter code length). Francois Chin, Institute for Infocomm Research (I2R)

  17. Multipath Performance (DSSS) For DSSS, No cyclic chip is needed when 3 RAKE is used. Francois Chin, Institute for Infocomm Research (I2R)

  18. Multipath Performance (PSSS) For PSSS, best performance with 2 RAKE fingers + 1 chip extension. Precoding (according to 15-04-0121-04-004b) & 3rd RAKE do not seem to help. Francois Chin, Institute for Infocomm Research (I2R)

  19. What happened to PSSS? Neighbouring parallel sequence is using M-Seq with 2 cyclic shifts in PSSS parallel sequence construction • Source doc.: IEEE 802.15-04-0121-04-004b While other schemes enjoy better multipath performance with more RAKE fingers, PSSS can only use up to 2 fingers as the 3rd RAKE is dominated by adjacent parallel bit sequence. PSSS is inter-parallel sequence interference limited Francois Chin, Institute for Infocomm Research (I2R)

  20. 915MHz BandsCOBI-16 vs DSSS Francois Chin, Institute for Infocomm Research (I2R)

  21. 915 MHz Coherent Receiver (BER Performance) • Even upto 1.33us RMS Delay Spread • 1 chip extension is NOT necessary for 16-chip sequence (COBI-16 & DSSS) ifsufficient RAKE fingers (at least 3) are used, even in dense multipath environment • General performance comparison: • COBI sequence (16 chip) > DSSS Sequence (16 chip) Francois Chin, Institute for Infocomm Research (I2R)

  22. 915 MHz Coherent Receiver (PER Performance) • Even upto 1.33us RMS Delay Spread • 1 chip extension is NOT necessary for 16-chip sequence (COBI-16 & DSSS) ifsufficient RAKE fingers (at least 3) are used, even in dense multipath environment • General performance comparison: • COBI sequence (16 chip) > DSSS Sequence (16 chip) Francois Chin, Institute for Infocomm Research (I2R)

  23. Can Non-Coherent Detection be used for COBI-16? • The COBI are designed to give best performance with coherent detection receiver. Can receiver employs Differential Chip detection?: • Yes, given 1% PER (20 octet packet) COBI sequence (16 chip) can handle multipath channels with RMS delay spread upto 0.3us for 915MHz bands using 1Mcps, which normally corresponds to short range indoor environment Francois Chin, Institute for Infocomm Research (I2R)

  24. 915 MHz Band Transmit PSD (COBI-16) • Beyond fc +/- 1.2 MHz, the highest sidelobe level is ~38 dB below the total transmit power and ~30 dB below the highest point in the PSD • Therefore, ~10 dB of margin to the -20 dBr spec. • For a device transmitting +10 dBm, there is ~8 dB of margin to the -20 dBm absolute spec. • Propose to be same as existing 915MHz Mask Francois Chin, Institute for Infocomm Research (I2R)

  25. 868MHz BandCOBI-8 vs PSSS Francois Chin, Institute for Infocomm Research (I2R)

  26. 868 MHz Transmit PSD& Achievable Chip Rate • Transmit PSD is dependent on the truncation of the pulse shaping filter • To support 450kcps, Raised cosine filter with roll-off 0.1 is suggested • Let’s examine this effect on raised cosine filter with roll-off 0.1 using truncation of 20, 10 & 6 chip periods 6-chip period 12-chip period 20-chip period Francois Chin, Institute for Infocomm Research (I2R)

  27. COBI-8 Transmit PSD truncation of the raised cosine filter (Roll-off 0.1) at 20 chip periods Francois Chin, Institute for Infocomm Research (I2R)

  28. COBI-8 Transmit PSD truncation of the raised cosine filter (Roll-off 0.1) at 10 chip periods Francois Chin, Institute for Infocomm Research (I2R)

  29. COBI-8 Transmit PSD truncation of the raised cosine filter (Roll-off 0.1) at 6 chip periods Francois Chin, Institute for Infocomm Research (I2R)

  30. PSSS Transmit PSD truncation of the raised cosine filter (Roll-off 0.1) at 20 chip periods Francois Chin, Institute for Infocomm Research (I2R)

  31. PSSS Transmit PSD truncation of the raised cosine filter (Roll-off 0.1) at 10 chip periods Francois Chin, Institute for Infocomm Research (I2R)

  32. PSSS Transmit PSD truncation of the raised cosine filter (Roll-off 0.1) at 6 chip periods Francois Chin, Institute for Infocomm Research (I2R)

  33. 868 MHz Transmit PSD& Achievable Chip Rate • Transmit PSD is dependent on the truncation of the pulse shaping filter • The longer the pulse shaping filter length, the higher the implementation complexity, the lower the PSD sidelobe level • pulse shaping filter implementation complexity will have significant effect on meeting transmit PSD Mask and thus the achievable chip rate • Transmit PSD mask: • |f-fc|>0.3MHz, relative limit < -50dBr, abs limit <-36 dBm • @ 450kcps, roll-off factor = 0.1, • COBI-8 & PSSS does NOT satisfy Mask Francois Chin, Institute for Infocomm Research (I2R)

  34. 868 MHz Transmit PSD& Achievable Chip Rate • Lower chip rate has to be sought, such that transmit PSD requirement can be met with reasonable transmit implementation complexity • 400kcps with raised cosine filter (roll-off 0.25) is proposed Francois Chin, Institute for Infocomm Research (I2R)

  35. PSSS Transmit PSD @ 400kcps • Transmit PSD requirement can be met with reasonable transmit implementation complexity. Data rate = 400kcps * 15/32 = 187.5kbps Francois Chin, Institute for Infocomm Research (I2R)

  36. COBI-8 Transmit PSD @ 400kcps • Transmit PSD requirement can be met with reasonable transmit implementation complexity. Data rate = 400kcps * 4/8 = 200kbps Francois Chin, Institute for Infocomm Research (I2R)

  37. Should COBI-8 use O-QPSK or BPSK? • @ 400kcps, Raised Cosine roll-off factor = 0.25, O-QPSK does give less amplitude variation across symbol than BPSK. Thus, O-QPSK is preferred O-QPSK BPSK PAPR~4dB PAPR~6dB Francois Chin, Institute for Infocomm Research (I2R)

  38. Amplitude variation for PSSS with Precoding • @ 400kcps, Raised Cosine roll-off factor = 0.25, PSSS with precoding does have larger amplitude variation PAPR > 10dB Francois Chin, Institute for Infocomm Research (I2R)

  39. 868 MHz COBI-8 vs PSSS(PER Performance Comparison) • Raised cosine filter • (roll-off factor = 0.25) • @ 400 kcps • Even upto 1.33us RMS Delay Spread • Similar performance between COBI-8 and PSSS at 1% PER Francois Chin, Institute for Infocomm Research (I2R)

  40. Can Non-Coherent Detection be used for COBI-8? • The COBI are designed to give best performance with coherent detection receiver. Can receiver employs Differential Chip detection?: • Yes, given 1% PER (20 octet packet), COBI sequence (8 chip) can handle multipath channels with RMS delay spread upto 0.3us for 868MHz band using both 400kcps (roll-off factor = 0.25), at even shorter range Francois Chin, Institute for Infocomm Research (I2R)

  41. 868 MHz COBI-8 vs PSSS Francois Chin, Institute for Infocomm Research (I2R)

  42. Multipath Performance Summary (Coherent Chip Despreading) • To combat inter-chip interference due to channel delay spread with RMS delay spread upto 1.33us (e.g. industry application space): • COBI 16-chip (O-QPSK with half-sine pulse shaping) is recommended for 915MHz bands; • COBI 8-chip (O-QPSK with raised cosine pulse shaping roll-off 0.25) is recommended for 868MHz bands. • RAKE combining (with at least 3 fingers) is necessary in receiver to combine path diversity; (this does not affect standard) • Few RAKE fingers can be used in realistic channels with lower delay spread • Differential chip despreading can also be used in shorter transmission range environment,e.g. residential space, where multipath channel RMS delay spread is upto 0.3us Francois Chin, Institute for Infocomm Research (I2R)

  43. Summary of Comparsion Note : Red - desirable Francois Chin, Institute for Infocomm Research (I2R)

  44. System Parameters for low GHz Bands Recommended Does not meet Transmit PSD Mask Francois Chin, Institute for Infocomm Research (I2R)

  45. Supporting Materials Francois Chin, Institute for Infocomm Research (I2R)

  46. AWGN Performance Francois Chin, Institute for Infocomm Research (I2R)

  47. Flat Fading Performance Francois Chin, Institute for Infocomm Research (I2R)

  48. Coherent Receiver Multipath Performance What leads to Multipath robustness? Frequency selectivity leads to Inter-chip interference, and that is the killer…. To overcome, code must have good autocorrelation properties, i.e. low sidelodes Francois Chin, Institute for Infocomm Research (I2R)

  49. COBI 8-chip autocorrelation matrix COBI 16-chip autocorrelation matrix How these codes achieve Multipath robustness? • COBI, maintain constant module, can at best achieve zero auto-correlation within 2 chips from cor. Peak; that is good enough to handle ICI of upto 2 chip periods • DSSS, comprising Walsh sequences, is not designed with auto-correlation sidelodes in mind • PSSS, uses flexibility in amplitude to achieve low (zero?) auto-correlation throughout for each parallel sequence. However, it is inter-parallel sequence interference limited Francois Chin, Institute for Infocomm Research (I2R)

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