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Operating System

Operating System. U2M3 Lecture 3 Interrupts. Objectives. Recall the parts of the CPU Describe how the interrupt mechanism works Describe different types of interrupt. CPU. The processor itself consists of 3 main components:

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Operating System

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  1. Operating System U2M3 Lecture 3 Interrupts

  2. Objectives • Recall the parts of the CPU • Describe how the interrupt mechanism works • Describe different types of interrupt

  3. CPU The processor itself consists of 3 main components: • Arithmetic-logic unit (ALU)in which all arithmetic and logic operations are carried out • Control unitcoordinates the activities taking place in the CPU, memory and peripherals • Registersspecial storage locations to hold information temporarily

  4. R0 Arithmetic logic unit Current Instruction Register (CIR) General purpose registers R1 R2 R3 Program Counter(PC) Status Register (SR) R4 R5 Memory Address Register (MAR) ControlUnit Memory Data Register(MDR) The MDR is sometimes known as the memory buffer register (MBR) External bus Main Memory CPU

  5. CPU Registers • Program Counter (PC) holds address of next instruction to be executed. It is also known as Sequence Control Register (SCR) • General Purpose Registers used for performing arithmetic functions. Some computers have only one, the Accumulator; others have up to 16 general purpose registers • Current Instruction Register (CIR) contains both the operator and the operand of the current instruction Contd.

  6. CPU Registers Contd. • Memory Address Register (MAR) holds the address of the memory location which data will be read or written from • Memory Data Register (MDR) used to temporarily store data read from or written to memory • Status Register (SR) contains bits that are set or cleared based on the result of an instruction. Status registers (also known as Program Status Words or PSWs) also contain information about interrupts

  7. No No Any instructions to execute? Fetch next instruction Decodeinstruction Execute instruction Any interrupts to be processed? Transfer control to interrupt handling program Yes Yes Start Interrupt • An interrupt is an event that alters the sequence in which a processor executes instructions. • It is generated by the hardware . • The CPU checks for an interrupt after each fetch-execute cycle.

  8. Interrupt Service Routine (ISR) When an interrupt occurs the • The OS gains control • Hardware passes control to the OS • The OS updates the PCB • saves the state of the interrupted process. It also saves the contents of the CPU registers. • Needed to restore process after servicing the interrupt. • The OS analyzes the interrupt • Passes control to the appropriate interrupt service routine (interrupt handler).

  9. Interrupt Service Routine (ISR) 4. The PC is loaded with the start address of the relevant interrupt service routine. 5. The interrupt handler processes the interrupt. 6. The state of the interrupted process is restored • The saved values of CPU registers are restored 7. The executed of the interrupted process continues.

  10. Types of Interrupt • SVC (Supervisor call) Interrupts. • I/O interrupts • External Interrupt • Restart Interrupt • Program check interrupts • Machine check interrupts

  11. SVC (Supervisor call) Interrupts SVC are initiated by a running process • Request made by a user for a system service such as • to perform I/O • to obtain more storage • to communicate with the system operator. May refuse request depending on user’s privileges.

  12. Input / Output interrupts initiated by Input / Output hardware; • signal to CPU that status of a channel or device has changed. occurs when • an I/O operation is complete • an error occurs • a device is made ready.

  13. External Interrupt • Cause by • Expiration of a quantum on an interrupting clock • Pressing the interrupt key by the operator • A signal from another processor in a multiprocessor system

  14. Reset Interrupt • Occurs when • the reset button is pressed • A reset SIGP (single processor) instruction arrives from another processor in a multiprocessor system

  15. Other Interrupts ( Not on syllabus) • Program check interruptsMay occur as a program’s machine language instructions are executed • Division by zero • Arithmetic overload • Data in wrong format • Attempt to access a protected resource • Machine check interruptscaused by malfunctioning hardware.

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