160 likes | 325 Views
Exception Handling (2). 68000 Exception Handling. The 68000’s exception vector table. Exception vector table. 256 longwords in low memory $00 0000 to $00 03FF (1024 bytes) Allow specialized routine to handle each exception type Some 8-bit uprocessors even have a small table.
E N D
Exception Handling (2) Lecture 3 - Instruction Set - Al
68000 Exception Handling • The 68000’s exception vector table Lecture 3 - Instruction Set - Al
Exception vector table • 256 longwords in low memory • $00 0000 to $00 03FF (1024 bytes) • Allow specialized routine to handle each exception type • Some 8-bit uprocessors even have a small table Lecture 3 - Instruction Set - Al
Exception Vector Table System reserves low Memory for the table If some vectors not used then no handler Rather than no pointer, point to a Spurious exception handler Lecture 3 - Instruction Set - Al
How to implement it? • First answer is MUST be in ROM – • 1st 2 longwords are initial supervisor stack pointer and initial program counter $00 0000 to ? • These must be there on start up • ROM is good as they will be there at startup • ROM is also bad as not easily modified • Changes require a new ROM Lecture 3 - Instruction Set - Al
Solutions • Fixed vector in ROM points to a second vector in RAM that points to routine • WHY? Not possible to get a 16 byte ROM • Possibly overlay a ROM and RAM at same addresses? • When address is in range $00 0000 to $00 0007 ROM is being addressed • Otherwise RAM Lecture 3 - Instruction Set - Al
Overlay scheme • When reading $00 0000 or $00 0004 actually read $00 1000 or $00 1004 Lecture 3 - Instruction Set - Al
Implementation of Overlay • When location $00 0000 or $00 0004 is address ROM is selected Lecture 3 - Instruction Set - Al
2nd Method – Shadow ROM • RAM and ROM are located in the same address space • At startup POR* selects ROM • POR* does a reset of FF1 • On Reads ROM is selected, on Writes RAM • Once vector table copied FF1 is set so future reads are from RAM Lecture 3 - Instruction Set - Al
Implementation • ROM is addressed until RAM* becomes low • After RAM* goes low the RS FF enables the RAM • RAM* would be a signal from an I/O port Lecture 3 - Instruction Set - Al
Processing an Vectored Interrupt • Complete instruction currently executing • Stack PC • Continue according to protocol Lecture 3 - Instruction Set - Al
IACK cycle • During IACK device provides vector number • The exception handler starts execution Lecture 3 - Instruction Set - Al
Hardware interface of device • 68000 family peripheral having IACK input • Note that IACK has unique Function Code, FC7, i.e., 111 Lecture 3 - Instruction Set - Al
Autovectored interrupt • Older devices and non-family devices unable to respond with appropriate vector number • Another pin, VPA*, Valid Peripheral Address is used to signal this. • Vector numbers 25-31 are reserved for autovectored interrupts on IRQ1* to IRQ7* • Avoids having a lot of glue logic for these older devices Lecture 3 - Instruction Set - Al
Timing of autovectored interrupts • Example • IRQ2* asserted • Followed by VPA* being asserted • Vector 26 used to respond • Autovectored are 25 to 31 in vector table Lecture 3 - Instruction Set - Al
Autovectored Hardware • System must have vectored interrupt hw • Autovectored needed only if 6800 family peripherals used Lecture 3 - Instruction Set - Al