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Statistical Analysis and Modeling for Error Composition in Approximate Computation Circuits. Wei-Ting Jonas Chan 1 , Andrew B. Kahng 1 , Seokhyeong Kang 1 , Rakesh Kumar 2 , and John Sartori 3 1 VLSI CAD LABORATORY, UC San Diego 2 PASSAT GROUP, Univ. of Illinois 3 Univ. of Minnesota.
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Statistical Analysis and Modeling for Error Composition in ApproximateComputation Circuits Wei-Ting Jonas Chan1, Andrew B. Kahng1, Seokhyeong Kang1, Rakesh Kumar2, and John Sartori3 1VLSI CAD LABORATORY, UC San Diego 2PASSAT GROUP, Univ. of Illinois 3Univ. of Minnesota
Why Approximate Computation? • Threats to traditional IC design approach ... Extreme variations / Reliability issues / Cost: • Approximate Computation: Relaxing the requirement of correctness can dramatically reduce costs of the design • Threats to traditional IC design approach ... Extreme variations: PVT variation uncertainty leads to design overhead Reliability issues: Hard errors (NBTI, latchup), Soft errors (α-particle) Cost: Cost (power/performance) of perfect accuracy is too high! • Approximate Computation Relaxing the requirement of correctness can dramatically reduce costs of the design What is the square root of 10 ? “a little more than three” Approximation could be faster and more powerful “3.162278....”
Reduce Design Cost with Approximations Approach: insert approximate hardware modules on critical paths Accurate hardware Approximate hardware Simplified critical paths but with errors What is the output quality of this circuit?
Building Blocks: Approximate Hardware Modules Zhu et al. TVLSI 2010 • ETAI: accurate part + inaccurate part • Reduce error size • Error rate is high • ETAIIM: limited carry-chain run-length • Extra protection hardware • Reduce error rate and significance
Result Quality Estimation of Approximate Computation Image smoothing (Addition operations executed by different approximate adders) Original image Accurate adder ACA ETAI ETAII LU (a) (b) (c) (c)~(f) have 50% power of accurate adder (b), BUT…… (d) (e) (f) How can system designers estimate result quality metrics for circuits containing approximate adders?
Problem: Result Quality Estimation Goal: quantify degradation of result accuracy after approximate hardware modules are inserted Accurate hardware Arithmetic hardware replacement Approximate hardware Correct results Approximate results How to compose errors at circuit level?Solution from this work: Given: Input statistical properties Hardware configurations Topologies of circuits Output: Estimated error metrics
Outline • Related Work • Problem Modeling and Proposed Approaches • Results and Conclusions
Related Work [HuangLR12] Our work • Intensively characterize error distributions over different intervals • Propagate distributions with interval arithmetic • Propagates error metrics • Improves estimation accuracy and runtime
Related Work [HuangLR12] PDF • Intensively characterize error distributions over different intervals • Single intervals represent multiple values in log scale quantization inaccuracy PMF abs(log(Probability)) Positive Errors Negative Errors -2max, -2min 2min, 2max If the inputs are out of range, there will be extra inaccuracy
Related Work [HuangLR12] • Source of estimation inaccuracy: quantization errors from interval representation • Accuracy does not scale with characterization runtime For better accuracy, alternative approach is required
Error Metrics for Quality Estimation • Error rate (ER): measures the frequency of error occurrences • Error significance (ES): measures the magnitude of errors • Average relative error significance (ARES): measures the ratio between error magnitude and signal magnitude • Mean square error (MSE): common metric in signal processing • Signal to Noise Ratio (SNR): common metric for quality of image processing • Max error (MAXE): measure the upper bound of errors
Outline • Related Work • Problem Modeling and Proposed Approaches • Results and Conclusions
Our Quality Estimation Approach Stage 1:Hardware characterization Stage 2: Composition of EMs Pre-characterized STD tables Traverse the design to propagate statistical property Statistical property Pre-characterized EMin tables Look up EMin in pre-characterized library Information of EMs Compute EM at output by propagations STD: standard deviation EMin: intrinsic error metric
Our Quality Estimation Approach Stage 1:Hardware characterization Stage 2: Composition of EMs Pre-characterized STD tables Traverse the design to propagate statistical property Statistical property Pre-characterizedEMin tables Look up EMin in pre-characterized library Information of EMs Compute EM at output by propagations
Hardware Characterization: Observation #1 • Observation #1: EMs of approximate hardware depend on input patterns {A, B} {A, B} {A, B} {A, B} ‘0’ CLA CLA CLA CLA RCA RCA RCA RCA MSB kguard blocks for MSB ETAIIM Input patterns decide whether carry chain will lose bits EMin = f( k, STDA, STDB )
Hardware Characterization: Observation #2 • Observation #2: EMs in ETAIIM-type adders depend on input distribution and hardware configuration ERvs. input STDs Log(ES)vs. input STDs k = 1 k = 2 k = 3 k = 4 k = # of guard blocks to mitigate errors
Hardware Characterization: Our Solution • Generate lookup tables to store pre-characterized EMs STDZ tables Hardware configurations EMsvs. input STDs STDA Generate libraries STDB EMin tables Hardware configurations STDA STDB
Our Quality Estimation Approach Stage 1:Hardware characterization Stage 2: Composition of EMs Pre-characterized STD tables Traverse the design to propagate statistical property Statistical property Pre-characterized EMintables Look up EMin in pre-characterized library Information of EMs Compute EM at output by propagations
Composition of EMs: Error Propagation Key issue: enable error propagation in circuit topology EMin: EM generated by approximate hardware {STD{A,B}, EM{A,B}}: propagated standard deviations / EMs from previous stages {EMZ, STDZ}:EMs and STDs at output nodes +*: approximate adders +* +* +* {STDz, EMZ} EMin {STDA, EMA} {STDB, EMB}
Composition of EMs: Observation • Observation: EM (e.g., rate, magnitude) at a node depends on both intrinsic and propagated EMs ERZ= 1-(1-ERin)⋅(1-ERA)⋅(1-ERB) ERZ ESZ +* +* +* +* +* +* ERin ESin Pass Rate ESA Pass Rate ERA ERB ESB Pass Rate ESZ = ESin + ESA + ESB (assume no cancellations between all error sources)
Composition of EMs: Our Method • Our method: • Traverse the circuit and propagate STDs in its topology • EMs are looked up in the pre-characterized libraries For each node, EMs are propagated as follows: Function=((A+B)+(C+D))+(E+F) Traverse and propagate ERZ = 1−(1−ERin) · (1−ERA) · (1−ERB) EMZ = EMin + EMA + EMB D A C E B F (for EMs other than ER)
Outline • Related Work • Problem Modeling and Proposed Approaches • Results and Conclusions
Results: Table-Lookup Approach • Testcase: 5-node adder tree • Input distributions: zero mean normal distribution with different STDs • Different configurations of ETAIIMs • Compared with Monte Carlo simulation
Experimental Results: FIR Filter • Approximate FIR Adders are approximate Multipliers are accurate • Estimation inaccuracies at each node for different error metrics NET4 NET2 NET1 NET3 C4 = 0.4 C2 = 0.2 C3 = 0.3 C1 = 0.1 NET5 NET6 NET7 NET8 NET9 NET10 NET11
Experimental Results: MAC • Approximate MAC(multiply-accumulate) • Adders are approximate Multipliers are accurate 14 levels of MAC are • tested • 20 testcases for each #level A1 A0 Ai Ci C1 C0 ... level 1 ... level i Output
MAC: Comparison with HuangLR12 Our method interpolates continuously changing EM in lookup table [HuangLR12] Relative inaccuracy = 109beyond the lower bound of characterization ES ER
MAC: Speedup and Accuracy Improvement Accuracy improvement = 3.75x Speedup= 8.4x Faster runtime allows designer to evaluate more design combinations Better accuracy reduce the iterations due to mis-prediction
Conclusions • We propose an approach for output quality estimation of approximate designs • Our approach achieves 8.4× runtime improvement for error composition and 3.75× average accuracy improvement for ES compared to previous (DAC-2012) work of Huang et al. • We demonstrate results on FIR filter and MAC circuits with up to 30 nodes
Future Work • Improve accuracy of EM estimation for relative error metrics (e.g., ARES and SNR) • Extend our approach to other approximate modules, including multipliers • Develop a synthesis flow for approximate circuits using our EM analysis approach • Generalize our approach to arbitrary input distributions
Experiment and Results Approximate circuit:Random-generated circuits Netlists are randomly generated with accurate multipliers and different ETAIIM approximate adders
Regression study of EM Composition • We also tried to generalize our propagation model with parameter regression • General form of error propagation models: • Simulated EM results from different hardware configurations and input distributions/EMs are used for regression • Parameters in the models are fitted with simulation data ) are regression parameters
Regression study of EM Composition • Results of parameter regression
Experimental Results: FIR Filter • Approximate FIR Adders are approximate Multipliers are accurate • Estimation inaccuracies at each node for different error metrics NET4 NET2 NET1 NET3 C4 = 0.4 C2 = 0.2 C3 = 0.3 C1 = 0.1 NET5 NET6 NET7 NET8 NET9 NET10 NET11