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Chapter 6 สถาปัตยกรรมไมโครโพรเซสเซอร์แบบต่างๆ Pro

Chapter 6 สถาปัตยกรรมไมโครโพรเซสเซอร์แบบต่างๆ Processor Architectures. เนื้อหา. Von-Neumann Architecture Harward Architecture CISC(Complex Instruction Set computer) Architecture RISC(Reduced Instruction Set computer) Architecture VLIW(Very Long Instruction Word) Architecture.

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Chapter 6 สถาปัตยกรรมไมโครโพรเซสเซอร์แบบต่างๆ Pro

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  1. Chapter 6สถาปัตยกรรมไมโครโพรเซสเซอร์แบบต่างๆProcessor Architectures

  2. เนื้อหา Von-Neumann Architecture Harward Architecture CISC(Complex Instruction Set computer) Architecture RISC(Reduced Instruction Set computer) Architecture VLIW(Very Long Instruction Word) Architecture

  3. How to classify processors • Categorized by memory organization • Von-Neumann architecture • Harvard architecture • Categorized by instruction type • CISC • RISC • VLIW

  4. Harvard architecture • Separate memory into 2 types • Program memory • Data memory • Used in MCS-51, MIPS etc.

  5. Harvard architecture

  6. Harvard Architecture From http://www.ee.nmt.edu/~rison/ee308_spr00/supp/000119/harvard.gif

  7. Von-Neumann architecture • Combine program and data in 1 chunk of memory • Example : 80x86 architecture

  8. Von-Neumann architecture

  9. Von-Neumann architecture From http://www.ee.nmt.edu/~rison/ee308_spr00/supp/000119/princeton.gif

  10. CISC Feature • Complex instruction set computer • Large number of instructions (~200-300 instructions) • Specialized complex instructions • Many different addressing modes • Variable length instruction format • Memory to memory instruction • For Example : 68000, 80x86

  11. RISC Feature • Reduced instruction set computer • Relatively few number of instructions (~50) • Basic instructions • Relatively few different addressing modes • Fixed length instruction format • Only load/store instructions can access memory

  12. RISC Feature: continued • Large number of registers • Hardwired rather than micro-program control • For Example : MIPS, Alpha, ARMetc.

  13. RISC vs CISC • CISC -- High Code Density • Fewer instructions needed to specify the algorithm • RISC -- Simpler to Design & Faster to Silicon • Higher Performance -- smaller die size • Lower power consumption • Easier to develop compilers to take advantage of all features

  14. Example of CPU Architectures • Intel: 80x86 • Motorola: 680x0 • Sun : Sparc • Silicon Graphics : MIPS • HP : PA-RISC • IBM: Power PC • Compaq: Alpha CISC RISC

  15. VLIW • Very Long Instruction Word • One instruction contains serveral independent operations that are executed in parallel LOAD R4,R2 ADD R1,R2 OR R5,R2 INVERT R7 1 Instruction LOAD R4,R2 ADD R1,R2 OR R5,R2 INVERT R7

  16. VLIW Processor

  17. VLIW

  18. VLIW • Instruction level parallelism • rely on the compiler to determine which instruction may be executed in parallel • The number of operations in VLIW instruction is equal to the number of execution units in the processor

  19. VLIW : Pros and cons • Advantage • Simpler and Faster than RISC • Disadvantage • Incremental in execution unit=> the program must be recompiled

  20. VLIW • Widely used in DSP(Digital Signal processing) applications • high performance and low cost • Less successful in general-purpose computer • customers demand software compatibility between generations of a processor

  21. จบ บทที่ 6

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