1 / 40

Operational Amplifier (2)

Operational Amplifier (2). Chapter 9. Topics. Two-Stage Op-Amps Gain-Boosting Input Rage Limitation Slew Rate Power Supply Rejection Noise. Simple Implementation of a Two-Stage Op-Amp. Stage 1. Two-Stage Op-Amp Employing Cascoding. (small voltage swings). High gain stage.

Download Presentation

Operational Amplifier (2)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Operational Amplifier (2) Chapter 9

  2. Topics • Two-Stage Op-Amps • Gain-Boosting • Input Rage Limitation • Slew Rate • Power Supply Rejection • Noise

  3. Simple Implementation of a Two-Stage Op-Amp Stage 1

  4. Two-Stage Op-Amp Employing Cascoding (small voltage swings) High gain stage

  5. Two-Stage Op-Amp With Single-Ended Output

  6. Gain-Boosting • Idea behind gain boosting: increase the output impedance without adding more cascode devices.

  7. Increasing the Output Impedance by Feedback Io Io is sensed by ro1, convert into voltage, subtracted Vb. Current-Voltage Feedback. Loop gain Increased by A1

  8. Output Resistance of a Source Degenerated Transistor

  9. Gain Boosting Using Feedback Analysis

  10. Implementation (Small signal gain) Vout, min=VOD2+VGS3

  11. Differential Implementation Minimum voltage at the drain of M3:

  12. Folded Cascode Gain Boosting (Minimum Vx)

  13. Various Implementations of Gain Boosting

  14. Input Range Limitations (Vin is input limited, as opposed to output limited)

  15. Extension of input CM Range As Vin, cm →VDD, the PMOS input pair turns off. As Vin, cm→0, the NMOS input pair turns off.

  16. Slew Rate • “Linear settling” is only applicable to sufficiently small inputs. • With a large input step, the output displays a linear ramp with a constant slope. The slope of the ramp is called the slew rate. • While the small signal bandwidth of a circuit suggests a fast time-domain response, the large signal speed may be limited by the slew rate simply because the current available to charge the dominant capacitor is limited.

  17. Response of a linear circuit to an input step • The slope of the step response is proportional to the final value of the output; if we apply a larger input step, the output rises more rapidly.

  18. Response of a linear circuit to an input step

  19. Linear Op-amp to Step Response

  20. Linear Settling in Time Domain

  21. Slewing in an Op-Amp Circuit

  22. Slewing During Low to High Transition

  23. Slewing During High to Low Transition

  24. Slewing • Slewing is a nonlinear phenomenon. If the input doubles, the output level does not double at all points because the ramp exhibits a slope independent of the input!

  25. Slewing in telescopic Op-Amp

  26. Slewing in a Folded Cascode Op-Amp

  27. Power Supply Rejection • Op-Amps are supplied from noisy lines, and must “reject” the noise adequately. • Power Supply Rejection Ratio (PSRR) is defined as the gain from input to the output divided by the gain from the supply to the output.

  28. Example (1) If M3 and M4 carry the same amount current, then VGS3=VGS4=VDS3=VDS4. Therefore VX=Vout At low frequencies, M3 carries ISS/2, VGS3 is constant for a bias current of ISS/2, therefore, noise from VDD couples directly to VX. Since VX=Vout, the VDD noise is coupled to Vout, with a gain of unity. The PSRR at low frequencies:

  29. Example (2) • Calculate the Low Frequency PSRR of the feedback circuit (KCL) (KVL)

  30. Example (3) (Low frequencies analysis, C1 and C2 do not draw any current) (PSRR) β=C1/(C1+C2), Vout/Vin=1/β=1+C2/C1

  31. Noise in a Telescopic Op-Amp (Do not contribute much noise)

  32. Noise in a Telescopic Op-Amp Observation: 1. Low impedance path to output via M3. 2. DivdeVout, M1 by Av2 (Flicker noise) Account for M1 and M2

  33. Rule of Thumb • Mentally change the gate voltage of each transistor by a small amount and predict the effect at the output.

  34. Noise in a Folded Cascode Circuit Do not contribute much noise

  35. Noise Analysis

  36. Equivalent CS Stages

  37. Noise due to M7

  38. Noise-Voltage Swing Trade-Off If the VOD of M9 and M10 is Reduced to increase output swing, the noise of M9 will increase.

  39. Noise in a Two-Stage Op-Amp Noise of stage 2 not so significant

  40. Summary (Telescopic) (Folded cascode, Only thermal noise is included) (Two Stage Op-Amp)

More Related