1 / 9

Summary of caches:

Summary of caches:. The Principle of Locality: Program likely to access a relatively small portion of the address space at any instant of time. Temporal Locality : Locality in Time Spatial Locality : Locality in Space Three Major Categories of Cache Misses:

tsarah
Download Presentation

Summary of caches:

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Summary of caches: • The Principle of Locality: • Program likely to access a relatively small portion of the address space at any instant of time. • Temporal Locality: Locality in Time • Spatial Locality: Locality in Space • Three Major Categories of Cache Misses: • Compulsory Misses: sad facts of life. Example: cold start misses. • Conflict Misses: increase cache size and/or associativity. Nightmare Scenario: ping pong effect! • Capacity Misses: increase cache size • Cache Design Space • total size, block size, associativity • replacement policy • write-hit policy (write-through, write-back)

  2. Virtual Memory • Main memory can act as a cache for the secondary storage (disk) • Advantages: • illusion of having more physical memory • program relocation • protection

  3. Pages: virtual memory blocks • Page faults: the data is not in memory, retrieve it from disk • huge miss penalty, thus pages should be fairly large (e.g., 4KB) • reducing page faults is important (LRU is worth the price) • can handle the faults in software instead of hardware • using write-through is too expensive so we use writeback

  4. Page Tables Virtual page

  5. Page Tables • Each memory reference requires 2 memory accesses (why?)

  6. Making Address Translation Fast TLB • A cache for address translations: translation lookaside buffer

  7. Modern Systems • Very complicated memory systems:

  8. For each of these, where could the data be and how would we find it? • TLB hit • TLB miss • Virtual memory hit • Virtual memory miss • Cache hit • Cache miss

  9. Summary: Levels of the Memory Hierarchy Upper Level Capacity Access Time Cost Staging Xfer Unit faster CPU Registers 100s Bytes <10s ns Registers prog./compiler 1-8 bytes Instr. Operands Cache K Bytes 10-100 ns $.01-.001/bit Cache cache cntl 8-128 bytes Blocks Main Memory M Bytes 100ns-1us $.01-.001 Memory OS 512-4K bytes Pages Disk G Bytes ms 10 - 10 cents Disk -4 -3 user/operator Mbytes Files Larger Tape infinite sec-min 10 Tape Lower Level -6

More Related