DATA REPRESENTATION

1. DATA REPRESENTATION Computer organization TCS 303/TIT 304

2. Introduction • A bit is the most basic unit of information in a computer. • It is a state of “on” or “off” in a digital circuit. • Or “high” or “low” voltage instead of “on” or “off.” • A byte is a group of eight bits. • A byte is the smallest possible addressable unit of computer storage. • A word is a contiguous group of bytes • Word sizes of 16, 32, or 64 bits are most common. • Usually a word represents a number or instruction.

3. Signed Fixed Point Numbers • For an 8-bit number, there are 28 = 256 possible bit patterns. These bit patterns can represent negative numbers if we choose to assign bit patterns to numbers in this way. We can assign half of the bit patterns to negative numbers and half of the bit patterns to positive numbers. • • Four signed representations we will cover are: • Signed Magnitude • One’s Complement • Two’s Complement • Excess (Biased)

4. Signed Integer Representation • Several representations exist for negative values: Sign Magnitude One's Complement Two's Complement 000 = +0 000 = +0 000 = +0 001 = +1 001 = +1 001 = +1 010 = +2 010 = +2 010 = +2 011 = +3 011 = +3 011 = +3 100 = -0 100 = -3 100 = -4 101 = -1 101 = -2 101 = -3 110 = -2 110 = -1 110 = -2 111 = -3 111 = -0 111 = -1

5. Sign Magnitude • Leftmost bit is sign bit: 0 for positive, 1 for negative • Remaining bits are magnitude • Drawbacks: • Sign bits give problems to addition and subtraction • Two representations for 0 • Rarely used • Also know as “sign and magnitude,” the leftmost bit is the sign (0 = positive, 1 = negative) and the remaining bits are the magnitude.

6. Example: • +2510 = 000110012-2510 = 100110012 • • Two representations for zero: • +0 = 000000002, • -0 = 100000002. • • Largest number is +127, smallest number is -12710, using an 8-bit representation.

7. Signed one’s Complement • The leftmost bit is the sign (0 = positive, 1 = negative). Negative of a number is obtained by subtracting each bit from 2 (essentially, complementing each bit from 0 to 1 or from 1 to 0). This goes both ways: converting positive numbers to negative numbers, and converting negative numbers to positive numbers. Example: • +2510 = 000110012-2510 = 111001102 • • problem? Two representations for zero: +0 = 000000002, -0 = 111111112. • • Largest number is +12710, smallest number is -12710, using an 8-bit representation.

8. Signed two’s Complement • The leftmost bit is the sign (0 = positive, 1 = negative). Negative of a number is obtained by adding 1 to the one’s complement negative. This goes both ways, converting between positive and negative numbers. • Example (recall that -2510 in one’s complement is 111001102): +2510 = 000110012-2510 = 111001112 • • One representation for zero: +0 = 000000002, -0 = 000000002.

9. Addition and Subtraction in 2’s complement • The rule for addition is add the two numbers, including their sign bits, and discard any carry out of the sign (leftmost) bit position. Numerical examples for addition are shown below. • Example: • + 6 00000110 - 6 11111010+13 00001101+1300001101 +19 00010011 +7 00000111 • +6 00000110 -6 11111010 -1311110011 -1311110011 -7 11111001 -19 11101101 • In each of the four cases, the operation performed is always addition, including the sign bits. • Only one rule for addition, no separate treatment of subtraction. Negative numbers are always represented in 2’s complement.

10. Overflow • The detection of an overflow after the addition of two binary numbers depends on whether the considered numbers are signed or unsigned. • When two unsigned numbers are added, an overflow is detected from the endcarry out of the most significant position. • In the case of signed numbers, the leftmost bit always represents the sign, and negative numbers are in 2’s complement form. • When two signed numbers are added, the sign bit is treated as part of the number and the end carry does not indicate an overflow.

11. Overflow example: +70 0 1000110 -70 1 0111010 +80 0 1010000-80 1 0110000 = +150 1 0010110 = -150 0 1101010 • An overflow cannot occur after an addition if one number is positive and the other is negative, since adding a positive number to a negative number produces a result that is smaller than the larger of the two original numbers. • An overflow may occur if the two numbers added are both either positive or negative.

12. Binary Multiplication (Unsigned) • A complex operation compared with addition and subtraction • Many algorithms are used, esp. for large numbers • Simple algorithm is the same long multiplication taught in grade school — Compute partial product for each digit — Add partial products

13. Multiplication Example 1011 Multiplicand (11 dec) x 1101 Multiplier (13 dec) 1011 Partial products 0000 1011 1011___ 10001111 Product (143 dec) Note: need double length result • Note: if multiplier bit is 1 copy multiplicand (place value) otherwise zero.

14. Simplifications for Binary Multiplication • Partial products are easy to compute: — If bit is 0, partial product is 0 — If bit is 1, partial product is multiplicand • Can add each partial product as it is generated, so no storage is needed • Binary multiplication of unsigned integers • reduces to “shift and add”

15. Control logic and registers • 3 n bit registers, 1 bit carry register CF • Register set up — Q register <- multiplier — M register <- multiplicand — A register <- 0 — CF <- 0 • CF for carries after addition • Product will be 2n bits in A Q registers

16. Unsigned Binary Multiplication

17. Flowchart for Unsigned Binary Multiplication

18. Booth’s multiplication algorithm • Bits of the multiplier are scanned one at a a time (the current bit Q0 ) • As bit is examined the bit to the right is considered also (the previous bit Q-1 ) • Then: 00: Middle of a string of 0s, so no arithmetic operation. 01: End of a string of 1s, so add the multiplicand to the left half of the product (A). 10: Beginning of a string of 1s, so subtract the multiplicand from the left half of the product (A). 11: Middle of a string of 1s, so no arithmetic operation. • Then shift A, Q, bit Q-1 right one bit using an arithmetic shift • In an arithmetic shift, the msb remains unchanged

19. Booth’s Algorithm

20. Example of Booth’s Algorithm (7*3=21)

21. Booth’s Algorithm Registers and Setup • 3 n bit registers, 1 bit register logically to the • right of Q (denoted as Q-1) • • Register set up • — Q register <- multiplier • — Q-1 <- 0 • — M register <- multiplicand • — A register <- 0 • — Count <- n • • Product will be 2n bits in A Q registers

22. Floating-Point Representation • + 6132.789 is represented in floating-point with a fraction and an exponent as follows: Fraction Exponent +0.6132789 +04 Scientific notation : + 0.6132789  10+4

23. Floating-Point Representation • 32-bit floating point format. • Leftmost bit = sign bit (0 positive or 1 negative). • Exponent in the next 8 bits. Use a biased representation. • Final portion of word (23 bits in this example) is the significand (sometimes called mantissa).

24. Floating Point Examples

25. 3-Bit Signed Integer Representations

26. Other representation • BCD • Gray codes • Excess-3 Codes • BCD not very efficient • Used in early computers (40s, 50s) • Used to encode numbers for seven-segment displays. • Easier to read?

27. BCD versus other codes (Example) The decimal 99 is represented by 1001 1001.

28. Gray Code • Gray code is not a number system. • It is an alternative way to represent four bit data • Only one bit changes from one decimal digit to the next • Useful for reducing errors in communication. • Can be scaled to larger numbers.