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Advanced Evaluation Techniques and Hardware-In-The-Loop Simulation. Darcy Bullock, P.E. Professor Purdue University. Requested Topics. What is Hardware-in-the-Loop (HITL) Why would you use it Historical Perspective Future Challenges. What is HITL.
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Advanced Evaluation Techniques and Hardware-In-The-Loop Simulation Darcy Bullock, P.E. Professor Purdue University
Requested Topics • What is Hardware-in-the-Loop (HITL) • Why would you use it • Historical Perspective • Future Challenges
What is HITL • Testing and Evaluation of control equipment/algorithms with a simulated plant
What is HITL Control Equipment Real World Traffic • Goal • Typical • HITL SimulatedController SimulatedPlant Control Equipment SimulatedPlant
Why would you want to use HITL • So you can make mistakes (and learn from them) in the lab, not the field. Then when you deploy, there should be fewer surprises. • So you have a controlled environment in which to experiment and quantify benefits. • So you have a facility for students to try things and learn from their mistakes. • Probe the “corners” of a control system without worrying about the consequences of failure
Hmm. • What if we could control a suitcase tester with a computer. • Monitor 24 volt phase outputs • Ground loop detector inputs as directed.
Alternative to HITL • Suitcase tester • Ok feature individual tester • Virtually impossible to evaluate interaction of various features on a single controller much less a “system” of controllers • “Full Up Testing”…. Plug everything together and hope they work
Historical Perspective • HITL has been used extensively by other industries for several decades. • 1985 at University of Vermont when Prof Bob Dawson explained his simulation system for testing/developing the control system on a PDP-11 controlling the gravel washing/production system.
Gate Control Logic • 1986 worked on a speed sieve design for gate control at the IBM Essex Junction Plant • 1987 senior design project worked with EE student and.. he built the control hardware.. I built a simulator in Modula II.
1993 • Moved to LSU in Baton Rouge, LA • Tom Urbanik invites me to participate with his team on the IVHS Research Center Proposal • Developed HITL concept for Smart Diamond Testing
Further Developments • TexSIM developed for Smart Diamond • Monty willl discuss next • CORSIM extended for hardware in the loop
1997-Present CID Uses • Testing ACS Lite algorithms • Algorithm development • Controller feature testing • Laboratory Based Instruction
1997 – Present Hardware • TTI Platform • Idaha Platform • Univ. of Minnesota Platform • Naztec/Eagle Platform • Portland PLC Platform • Emergence of a Software Platform (Univ of Arizona, Siemens, Univ of Utah)
Project Setup • Choose a real system to design and simulate • Obtain plans, volumes, etc. from DOT • Systems that are being constructed, need to be upgraded, or were recently upgraded are ideal
5 10 5 7 5 10 5 7 3.0 4.0 3.0 3.5 3.0 4.0 3.0 3.5 1.5 2.0 1.5 2.0 1.5 2.0 1.5 2.0 15 15 15 15 7 7 7 7 20 50 20 40 20 50 20 40 3.0 2.5 3.0 2.5 3.0 2.5 3.0 2.5 Project: Design Process • Calculate timing parameters
Project: Design Process • Obtain cycles, offsets, and splits from Synchro or Highway Capacity Software
Project: Real-Time Simulation • Controllers are configured with the calculated timings and coordination timings
Project: Real-Time Simulation • Simulation model is built using proposed geometries and vehicle volumes and imported into CORSIM CORSIM ITRAF
I/O Mapping • Vehicle sensors are mapped to the corresponding phases by the students Controller Controller Mapping Detector Cards
“Final Lab Exam” 1 controller plugged into 1 CID for each intersection All CIDs plugged in to 1 PC running CORSIM All controllers plugged in to 1 PC running remote software
Closed Loop Monitoring Screens • PC set up to monitor the system remotely • Change controller parameters • View signal and detector status
For future HITL Challenges • Commercially viable CIDs that supports both TS2 Type 1 and Type 2 I/O AND a • Well supported integration with an accepted simulation model (CORSIM) • Blurring of software/hardware in the loop • Formally addressing the timing latency issue between simulation clock and controller.