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AMPLINE

AMPLINE. Chad Nickell Sean Martin Chris Rothe Daniel Shay. Presentation Overview. System Overview Core Motor Assembly Receiver/Transmitter Hardware Software algorithms Administrivia Progress Schedule Tasks Division of labor. Description.

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AMPLINE

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  1. AMPLINE Chad Nickell Sean Martin Chris Rothe Daniel Shay Nickell, Martin, Rothe, Shay

  2. Presentation Overview • System Overview • Core • Motor Assembly • Receiver/Transmitter Hardware • Software algorithms • Administrivia • Progress • Schedule • Tasks • Division of labor Nickell, Martin, Rothe, Shay

  3. Description The Ampline System will locate a hockey puck and control a tripod to follow it with a camera. Nickell, Martin, Rothe, Shay

  4. System Overview Camera Tripod Transmitter Motors Core Control Receiver Nickell, Martin, Rothe, Shay

  5. Core System - Objectives • Get data from receivers • Process data • Output camera movement data Nickell, Martin, Rothe, Shay

  6. Core System - Implementation • Motorola 68HC000 Processor • Xilinx Spartan XCS10 FPGA • 74LS244 Bus Drivers • 74LS245 Bus Transceivers • 27C512 EPROMs (2 x 64 kB) • 2 x 128 kB SRAM • ECS-22008 12 MHz Clock • Power Circuitry • LM7805 5V Regulator • LM7833 3.3V Regulator Nickell, Martin, Rothe, Shay

  7. Nickell, Martin, Rothe, Shay

  8. Core System - Processor • Motorola 68HC000 Processor • Xilinx Spartan XCS10 FPGA • 74LS244 Bus Drivers • 74LS245 Bus Transceivers • 27C512 EPROMs (2 x 64 kB) • 2 x 128 kB SRAM • ECS-22008 12 MHz Clock • Power Circuitry • LM7805 5V Regulator • LM7833 3.3V Regulator Nickell, Martin, Rothe, Shay

  9. Nickell, Martin, Rothe, Shay

  10. Core System - Memory • Motorola 68HC000 Processor • Xilinx Spartan XCS10 FPGA • 74LS244 Bus Drivers • 74LS245 Bus Transceivers • 27C512 EPROMs (2 x 64 kB) • 2 x 128 kB SRAM • ECS-22008 12 MHz Clock • Power Circuitry • LM7805 5V Regulator • LM7833 3.3V Regulator Nickell, Martin, Rothe, Shay

  11. Memory Map Nickell, Martin, Rothe, Shay

  12. Nickell, Martin, Rothe, Shay

  13. Core System - FPGA • Motorola 68HC000 Processor • Xilinx Spartan XCS10 FPGA • 74LS244 Bus Drivers • 74LS245 Bus Transceivers • 27C512 EPROMs (2 x 64 kB) • 2 x 128 kB SRAM • ECS-22008 12 MHz Clock • Power Circuitry • LM7805 5V Regulator • LM7833 3.3V Regulator Nickell, Martin, Rothe, Shay

  14. Nickell, Martin, Rothe, Shay

  15. FPGA Contents • Boundary Scan Block to allow reprogramming • Microprocessor Handshaking Logic • Motor Control Logic Nickell, Martin, Rothe, Shay

  16. Core System - Power • Motorola 68HC000 Processor • Xilinx Spartan XCS10 FPGA • 74LS244 Bus Drivers • 74LS245 Bus Transceivers • 27C512 EPROMs (2 x 64 kB) • 2 x 128 kB SRAM • ECS-22008 12 MHz Clock • Power Circuitry • LM7805 5V Regulator • LM7833 3.3V Regulator Nickell, Martin, Rothe, Shay

  17. Nickell, Martin, Rothe, Shay

  18. Camera Tracking System • Controlled my commands from μp • Use stepper motors to control horizontal and vertical angle • Mounted on an available tripod • Gearing tailored to the angular response requirements Nickell, Martin, Rothe, Shay

  19. Camera Tripod - Stepper Motors • One Stepper motor with a threaded shaft to control vertical movement • One Stepper motor mounted vertically to control horizontal motion Nickell, Martin, Rothe, Shay

  20. Camera Tripod - Stepper Control • H bridge chips UC3770 or UC3717 with protection diodes • For Bipolar Motors we will use a total of two chips. • Logic built into the FPGA • Memory map control commands • Timing offloaded to FPGA • Reduce μP load Nickell, Martin, Rothe, Shay

  21. Camera Tripod - Motor Driver Nickell, Martin, Rothe, Shay

  22. Camera Tripod - Power • Motors require voltages in the range of 12 VDC • Current up to 2 amps • Noise problems require that steppers isolated from the microprocessor • DC-DC Converter or separate transformer Nickell, Martin, Rothe, Shay

  23. RF RX/TX • No go - phased array, or wave guide arrays too expensive and difficult • Transmitter would require too much RF power (1 mW) • Alternatives: Ultrasound, IR, Vision Recognition Nickell, Martin, Rothe, Shay

  24. Ultrasonic – RX/TX • Many advantages • Cheap transducers • Slower Wave propagation • Algorithm Easier to implement • As few as 4 receivers required for operational system • More Support • Scare the rats away Nickell, Martin, Rothe, Shay

  25. Locator Algorithm • Ultrasonic Pulse arrives at each receiver at different times • Use the speed of sound as a constant to determine distance Nickell, Martin, Rothe, Shay

  26. Ultrasonic Timing Diagram Transmitter sends pulse Transmitter sends 2nd pulse First receiver gets pulse Last receiver gets pulse Time = 0 T1 T2 T3 T4 T5 Time = 50ms Processing and Camera Movement Done Nickell, Martin, Rothe, Shay

  27. Ultrasonic Receiver Module Ultrasonic Amplifier (High Gain Op Amp) Comparator Receiver Core Board Nickell, Martin, Rothe, Shay

  28. Ultrasonic Transmitter Module Timer (50 ms) Amplifier Ultrasonic Transmitter Nickell, Martin, Rothe, Shay

  29. Software Requirements • Monitor Program for development and debugging • Software Executive to interface the distance calculations and camera control • Camera Control Drivers • Distance Algorithm Nickell, Martin, Rothe, Shay

  30. Monitor Program • Load into SRAM and execute code • Minimize the code space • Use S records Nickell, Martin, Rothe, Shay

  31. Software Executive • Main Loop no OS • Simple • This is a task specific machine • Subtasks • Find position • Determine position relative to current camera location • Command the camera tracker to acquire the target Nickell, Martin, Rothe, Shay

  32. Camera Control Drivers • Memory Map the control of the camera pointing • Maintain Memory of Current Location • Variable speed actuation • Multiple Directions Nickell, Martin, Rothe, Shay

  33. Distance Algorithm -If R1 is at the origin, the length of (T,R2) segment, assuming speed of sound fixed, is d+cDt. -Using the law of cosines, (d+cDt) 2 = z2+d2-2zdcosa d2+2dcDt+(cDt) 2 = z2+d2-2zdcosa d(2cDt+2zcosa) = z 2 -(cDt) 2 Nickell, Martin, Rothe, Shay

  34. Progress Report • μP board wired w/ exception of serial port and peripherals • Board Runs Code From EPROM • Memory Test Working • Parts Ordered Nickell, Martin, Rothe, Shay

  35. Problems Encountered • BSCAN block was not included in Xilinx Schematics so FPGA could not be reprogrammed • Bus Driver was not working • Handshaking Logic was incorrectly specified • IPLO, BERR, BGACK, VPA needed to be pulled up to VCC Nickell, Martin, Rothe, Shay

  36. Schedule Nickell, Martin, Rothe, Shay

  37. Current Tasks • Spoke with Professor Kuester to finalize and help clear up RF design • Decided on an Ultrasonic design • Finished Testing EPROM and RAM to ensure correct functionality and interface with M68k • Construct Serial Port on Board • Begin testing and prototyping Ultrasonic design • Begin testing and prototyping Motor Design Nickell, Martin, Rothe, Shay

  38. Parts List/Costs • Main Board Description Price Quantity Total • Board $10 1 $10 • Processor Motorola 68k $0 1 $0 • EPROM Fairchild 27C512 $0 1 $0 • EPROM AMD 27C512 $0 1 $0 • RAM Samsung K6T1008 $0 2 $0 • FPGA Spartan XCS10 $0 1 $0 • Multi Function Peripheral MC68901 $0 1 $0 • Standoffs $0.5 4 $2 • Motor Control • Stepper Motors SMT-63 $2.75 2 $5.50 • Gears GR-5 $2.75 1 $2.75 • Stepper Motor Driver UC3770BN $0 4 $0 • Transmitter/Receiver • Ultrasonic RX/TX Pair $5.00 5 $25.00 • Total $45.25 Nickell, Martin, Rothe, Shay

  39. Chad Motor Control Feedback vs. Memory Motor Power Daniel Core microprocessor Serial / Peripherals Mechanical design of tripod PCB – Ultrasonic Receivers Prototype Verification Sean Lead software development Ultrasonic Coding Motor Drivers Transmitter/Receiver Integration and Test Chris Core microprocessor Transmitter/Receiver Design and Prototype Division of Labor Nickell, Martin, Rothe, Shay

  40. Questions Nickell, Martin, Rothe, Shay

  41. “Thank You, Thank You, Thank You…” –Dave Kelly Nickell, Martin, Rothe, Shay

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