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A NEW 5-TRANSISTOR XOR-XNOR CIRCUIT BASED ON THE PASS TRANSISTOR LOGIC. Vimal Kant Pandey. Introduction . XOR-XNOR circuits are the basic building block of many arithmetic and encryption circuits e.g. adders, multipliers , Comparators, Parity Checkers etc.
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A NEW 5-TRANSISTOR XOR-XNOR CIRCUIT BASED ON THEPASS TRANSISTOR LOGIC Vimal Kant Pandey
Introduction • XOR-XNOR circuits are the basic building block of many arithmetic and encryption circuits e.g. adders, multipliers, Comparators, Parity Checkers etc. • Careful design and analysis is required for XOR-XNOR circuits to obtained –full output voltage swing, lesser power consumption and delay in the critical path. • We proposed a new XOR-XNOR circuit and compare it’s performance with different designs. • The designs are simulated using TSPICE in the voltage range of 0.6V to 1.2V using 90nm CMOS technology.
Previous Work • In the past two decades, a number of circuit techniques have been reported with a view to improve the circuit performance of XOR-XNOR gates [3]-[4]. • Shiv et al. [5], the XOR–XNOR circuit is design based on pass-transistor logic (PTL) and CMOS inverter (Fig1 ) has • lower PDP, • less power dissipation and • faster compared to design in [6] with a low supply voltage. • However both of the circuits give a poor signal output voltage in certain input combination. Figure1: XOR-XNOR gate using 8 transistors in [5]
D. Radhakrishnan et al. [2], the XOR and XNOR circuit based on Pass Transistor Logic (PTL) using 6 transistors is reported as shown in Figure 2. It has • a full output voltage swing • better driving capability • Elgamel et al. [7] , has designed improved version of [2] in Fig. 3 has • has better power-delay product and • higher noise immunity . Figure 3: XOR-XNOR gate using 8 transistors in [4] Figure 2: XOR-XNOR gate using 6 transistors in [2]
Proposed Design • The proposed design of XOR-XNOR gate and it’s operation is shown below:
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