1 / 38

Computer Load Enhancer - II

Computer Load Enhancer - II. Luke Goss Tiffany Lin Ilyssa Jing Lu. Motivation. Increase number of computers that can be connected to a single circuit of a building Inexpensive alternative to expensive electrical system upgrades, rewiring of a building can cost millions. Motivation .

waldron
Download Presentation

Computer Load Enhancer - II

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Computer Load Enhancer - II Luke Goss Tiffany Lin Ilyssa Jing Lu

  2. Motivation • Increase number of computers that can be connected to a single circuit of a building • Inexpensive alternative to expensive electrical system upgrades, rewiring of a building can cost millions

  3. Motivation • Applicable in many older buildings with electrical systems not built to support multiple computers or heavy loads in general such as: - small businesses - schools - rural areas - hospitals

  4. Objectives • Correct the nonlinear signal coming from a computer load • Improve power factor of a personal computer • Allow for up to 8 computers to be connected to a wall circuit • Package circuitry into something commercially viable

  5. Design Decisions • Analog vs. Digital • Sensitivity to component parameters • 3 methods: passive filter, AC-DC converter, active power filter

  6. Why Active Filter? • Cost-efficient • Most marketable • Most complex, but most precise correction • Advocated by current research

  7. Design Overview • Block Diagram AC Source Active Power Filter Non-linear Load

  8. Design Overview • Two methods to match the nonlinear load current with the source waveform: - add harmonics to the source to match the load - or add harmonics to the load to match the source  we chose the latter

  9. Design Overview • Switch matrix:

  10. Control

  11. Control Design • Analog • PI control which constrains the duty ratio of the PWM that drives the switches

  12. PI Control Circuitry

  13. The constraints for this design can be determined from duty ratio analysis The average voltage of an inductor is 0.  Vl = 0 = DTs(Vs + Vc) + (1 - D)Ts(Vs-Vc) Vc = Vs/(1 – 2D) Control

  14. From the perspective of Vs, it sees a linear load that can be represented by Re Vs = Re*Is Control

  15. Using these two equations, we end up with an equality that incorporates both constraints and is in a form that can be implemented (1/Ti) Vmdt = (1/Ti)DTsVm = 2DVm = Vm - RsIs Control

  16. PI Control Hardware • SR Latch • Clock • Comparators • Inverter/CMOS Analog Switch

  17. Testing - Comparator • Comparator - CH1(+ input): 5 V/div 5 V pulse - CH2: 200 mV/div - 20 us/div

  18. Testing – SR Latch • SR Latch - CH1 (Set): Clock - Reset: GND - CH2 (Output Q)

  19. Testing - Clock • CH 1 • 5 V/div • 10 us/div • Clock speed: 35kHz

  20. Testing – Integrator Switch • When Q=1, it signals the integrator switch to close • No printable results because Jing destroyed the switch during demo

  21. Electrical Interface Panel • Primarily used to bridge between the computer load and the electrical supply system • Contains fuse ports for safe operation (1) • Cord, switch, and “filtered” receptacle for computer (2) • Platform supports expansion for self contained power supply (3) • Constructed of common electrical devices, terminal strips, and steel back-plate

  22. APF Hardware • Current Sensor • Buffer • Inductors • Drivers • IGBTs

  23. Current Sensor • Closed loop Hall effect current sensor to monitor pc load • Provided isolation from load and control circuit • Employed a unity gain buffer to relay the voltage to the control • Sensor required special Berg type connectors for its pins

  24. Input Inductors • Used to buffer the current into the bridge network • Minimize current ripple, low permeability metal used • Hand wound because of current rating of 2A rms expected • Calculated 1mH inductor using T131-26 material supplied by Micrometals, Inc. • Used 50 turns of 20 gauge magnet wire • Tested using lab equipment, value of 500u obtained

  25. The Power Stage

  26. The Power Stage • Bi-directional current bridge (H-bridge) • Energy storing capacitor - dc voltage on the capacitor is converted to ac through this bridge - bridge is analogous to a boost converter • Reactive and harmonic current needed by the computer load is generated • Results in an equivalent linear load seen by the source.

  27. Important Assumptions & Details • The capacitor voltage is higher than the peak ac line (peak  170V), control objective to maintain this • The capacitance is large enough so the voltage remains constant over one switching cycle

  28. Transistors in H-Bridge • Operated as switches via driver ICs • Switched in complimentary manner • Must have sufficient current, bus voltage, and frequency rating • Selected ultrafast IGBT’s rated for 12A and 600V, switched up to 40kHz • Tested as a switch simply by applying rated gate voltage to close and light an LED

  29. High-Low Driver ICs • Receive logic level input, output required gate voltage • High side requires bootstrap diode and capacitor • Selected drivers based on operational voltage, gate supply range, and compatibility with IGBTs (both made by International Rectifier)

  30. Testing High-Low Driver ICs • Tested extensively:  5 V square wave applied to one input and the inverted signal applied to other input • Expected 15 volts at high output and its compliment at the low output

  31. Testing High-Low Driver ICs • Applied same test to final new driver • Output exactly as expected • Retested “bad” drivers – some ok

  32. Conclusions on Drivers • Complimentary logic inputs or damage will occur • Both high and low outputs consistently worked when isolated from transistors • Destroyed drivers when interfaced with transistors – current limiting resistors important! • Problem with new set of drivers • Conquered drivers just last night – problem traced to ground problems and (most likely) human error

  33. Final Product

  34. Overall Success • Current sensor worked as designed • Switches operated correctly • Sub-circuits working individually at different times

  35. Challenges • Closed loop circuit, dynamic operation • Analog design sensitive to noise • Getting smooth output signals from devices • Developing troubleshooting strategy, standards • Unreliable inputs- bench voltage, SR latch, human error

  36. Challenges • Special order parts are at the mercy of the supplier • Numerous physical circuit elements – how to pick the right one or best one

  37. Where to go from here… • Digital instead of Analog control – DSP microcontroller • Permanent PC board • Self contained power supply • Packaging

  38. Questions? Special thanks to Mr. Jonathan Kimball & Professor Philip Krein for all their help.

More Related