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More on the Atmega32 instruction set

More on the Atmega32 instruction set. Basic Instructions. Don’t confuse instructions with directives. Directives are used by the Assembler as it generates machine code from assembly instructions Directives are not converted to machine instructions Instructions appear in blue in AVRStudio.

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More on the Atmega32 instruction set

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  1. More on the Atmega32 instruction set Basic Instructions CS-280 Dr. Mark L. Hornick

  2. Don’t confuse instructions with directives • Directives are used by the Assembler as it generates machine code from assembly instructions • Directives are not converted to machine instructions • Instructions appear in blue in AVRStudio CS-280 Dr. Mark L. Hornick

  3. Detailed descriptions of each instruction can be accessed from the online help of AVRStudio For each instruction, the online help describes • Purpose • Notes on operation • Allowed syntax • Machine instruction opcode • Possible address modes • Effect on SREG • Varies with instruction CS-280 Dr. Mark L. Hornick

  4. Bit manipulation Negate 2’s complement Complement 1’s complement Shift Set/Unset Logical Operations AND, OR, XOR Load/Store Memory to register Register to memory Math Addition Subtraction Multiply Divide Comparisons Register to register Data Transfer Register to register Data memory to register SRAM and EEPROM Instruction categories

  5. Math – two instructions for addition • ADD – add register to register • Adds two 8-bit values (in registers) together • Affects the SREG • SREG status after ADD can be used for conditional branching logic • ADC – add register and Carry bit to register • Adds two 8-bit values (in registers) together, as well as the Carry bit in SREG • Carry bit is used to perform multi-byte addtion • Affects the SREG • SREG status after ADC can be used for conditional branching logic CS-280 Dr. Mark L. Hornick

  6. Math – four instructions for subtraction • SUB Rd, Rn – subtract register from register • subtracts two 8-bit values (in registers) • Same as adding the two’s complement of one register to another (but faster) • NEG R1 • ADD R0, R1 • Works on all registers R0-R31 • SBC – subtracts two registers AND subtracts the C flag in SREG • Analogous to ADC instruction • Restriction: Works only on R16-R31 • SUBI – subtract constant from register • No analogous ADD instruction • …so use SUBI R16, -1 to add 1 to R16, but be careful about resulting SREG bits! • Restriction: Works only on R16-R31 • SBCI – subtract constant from register AND subtracts the C flag in SREG • No analogous ADD instruction • Restriction: Works only on R16-R31 CS-280 Dr. Mark L. Hornick

  7. Math – complement • NEG – performs two’s complement • Flips the bits and then adds 1 • Effectively turns a positive number negative • 0x01 -> 0xFF (-1) • 0xFF -> 0x01 • 0x00 -> 0x00 • 0x80 -> 0x80 • Affects SREG based on result • COM – performs one’s complement • flips the bits in a register • 0x0F -> 0xF0 • Affects SREG and ALWAYS sets Carry bit CS-280 Dr. Mark L. Hornick

  8. Math – increment / decrement • INC – adds 1 to a register • Not quite the same as using ADD to increment a register • Affects SREG, but does NOT affect Carry bit • DEC – subtracts 1 from a register • Like INC, DEC does NOT affect Carry bit CS-280 Dr. Mark L. Hornick

  9. Comparison instructions (1) • CP – compare one register to another • CP R0, R1 ; internally, subtracts R1 from R0 • Does not affect registers being compared • All SREG bits set according to result of virtual subtraction • CPI – compare a register to a constant • CPI R16, 1 ; internally, subtracts 1 from R16 • Does not affect register • Restriction: can only use R16-R31 • All SREG bits set according to result of virtual subtraction CS-280 Dr. Mark L. Hornick

  10. Comparison instructions (2) • CPC – compare one register to another with Carry • CPC R0, R1 ; internally, subtracts R1 and C from R0 • Does not affect registers being compared • All SREG bits set according to result of virtual subtraction • CPSE – compare one register to another and skip next instruction if equal • CPSE R0, R1 ; internally, subtracts R1 from R0 • Does not affect registers being compared • NO SREG bits set according to result of virtual subtraction CS-280 Dr. Mark L. Hornick

  11. Transfer instructions • MOV – copy one register to another • Does not affect SREG at all • SWAP – swaps nibbles (nybbles) in a register • 0xFA -> 0xAF etc • Does not affect SREG at all CS-280 Dr. Mark L. Hornick

  12. Bit manipulation (1) • CLR – clear a register (to 0) • SER – set all bits in a register (to 1) • CBR – clear specific bits in a register • cbr r16, 0x0f ; clears lower 4 bits • Works only on registers 16-31 • SBR – set specific bits in a register • sbr r16, 0x0f ; sets lower 4 bits • Works only on registers 16-31 CS-280 Dr. Mark L. Hornick

  13. Bit manipulation (2) • AND – logical AND between two registers • ANDI – logical AND between register and constant • ANDI R16, 0x01 ; result is 1 if bit 0 in R16 was 1; all other bits in R16 are set to 0 • Restriction: works only on R16-R31 • OR – logical OR between two registers • ORI – logical OR between register and constant • ORI R16, 0x01 ; result is R16 bit 0 is 1 regardless of previous bit value; all other bits in R16 are their previous values • Restriction: works only on R16-R31 CS-280 Dr. Mark L. Hornick

  14. Bit shifting • ROL – shifts all bits in a register to the left • Previous value of C is shifted into bit 0 • Bit 7 of register is shifted into C • LSL – shifts all bits in a register to the left • Bit 0 is cleared • Bit 7 is shifted into C • ROR – shifts all bits in a register to the right • Bit 0 is shifted into C • Previous value of C is shifted into bit 7 • LSR – shifts all bits in a register to the right • Bit 0 is shifted into C • Bit 7 is cleared CS-280 Dr. Mark L. Hornick

  15. ORI vs SBR instruction • SBR and ORI are the same instruction • SBR R20, 0x01 • ORI R20, 0x01 • The Assembler generates exactly the same opcode from either • Both perform a logical OR of the two operands and place the result in the target register • If you want to set the bits in the target, clear the target first • CLR R20 ; make sure the register is clear • SBR R20, 0x01 CS-280 Dr. Mark L. Hornick

  16. Remember: Various instructions affect the SREG differently • Not all bits are always affected • Ex: INC and DEC never affect the Carry bit • Some branch instructions cannot be used if the previous instruction did not affect the SREG in a way that makes sense for a particular branch instruction • Ex: You can’t test to see if INC overflowed a registerby testing the Carry bit • Ex: COM always sets the Carry bit • Makes no sense to follow COM with BRCC (BRanch if Carry Clear) CS-280 Dr. Mark L. Hornick

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