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Instructions: Language of the Computer

Instructions: Language of the Computer. Instructions. Each computer “speaks” its own language Instructions : words of computer’s language Instruction set : “vocabulary” ( مفردات اللغة ), the set of commands understood by a given architecture Computer languages are very similar

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Instructions: Language of the Computer

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  1. Instructions: Language of the Computer Full credit of these slides is given to Dr. Mohammad Sinky

  2. Instructions • Each computer “speaks” its own language • Instructions: words of computer’s language • Instruction set: “vocabulary” (مفردات اللغة), the set of commands understood by a given architecture • Computer languages are very similar • More like regional dialects (لهجات مختلفة), rather than different languages • Easy to pick up other languages once you learn one • Common goal for computer designer: to find a language that makes it easy to build hardware and compiler while maximizing performance and minimizing cost and energy. Full credit of these slides is given to Dr. Mohammad Sinky

  3. Instruction Set Architecture and Computer Organization Ex. C = A + B; (ALU: Arithmetic Logic Unit) • ISA types: • General Purpose Register (GPR) • Accumulator Stack PUSH A PUSH B ADD POP C LOAD A ADD B STORE C LOAD R1, A LOAD R2, B ADD R3, R1, R2 STORE C, R3 TOS ACC ALU ALU ALU most modern CPUs are of the GPR type [A] Memory Full credit of these slides is given to Dr. Mohammad Sinky

  4. Instruction Set Architecture and Computer Organization • Instruction Operations • What kind of operations can the ISA perform? • Instruction Operands • Are generally in one of two places (registers or memory) • What are the types of operands? • What are the sizes of operands? • How many operands are explicitly named in the instruction? Full credit of these slides is given to Dr. Mohammad Sinky

  5. The MIPS ISA • The chosen ISA is MIPS • Developed in 1981 by John L. Hennessey and grad students at Stanford University • Commercialized by MIPS Technologies (now Imagination – www.mips.com) • Makes up a large share of embedded core market • Network/storage equipment, cameras, printers, etc. • Over 65 instructions • MIPS very typical of other ISAs Full credit of these slides is given to Dr. Mohammad Sinky

  6. MIPS Instruction types • Arithmetic • Logical • Data transfer • Conditional branch • Unconditional jump Full credit of these slides is given to Dr. Mohammad Sinky

  7. MIPS Arithmetic Operations and Operands Full credit of these slides is given to Dr. Mohammad Sinky

  8. MIPS Arithmetic Operations • Addition/Subtraction of three operands • Two sources and one destinationadd a, b, c # a gets b + c • All arithmetic operations have this form • With fixed number of operands, the H/W will be simple • Three principles of hardware design • Design principle 1: Simplicity favors regularity • Instructions with a consistent # of operands are easier to encode and handle in H/W • Regularity makes implementation simpler • Simplicity enables higher performance at lower cost • Suppose we want: a = b + c + d + e ? • Need 3 lines of assembly code:add a, b, c # a = b + cadd a, a, d # a = (b + c) + dadd a, a, e # a = (b + c + d ) + e Comments • keeping all instructions a single size • always requiring three register operands in arithmetic instructions • keeping the register fields in the same place in each instruction format Full credit of these slides is given to Dr. Mohammad Sinky

  9. MIPS Arithmetic Operands – Registers 32 x 32-bit register file (1st page of the book) • 32 registers exist in MIPS architecture • Registers refer to the actual hardware • Used for frequently accessed data • Each register is 32 bits • 32-bit data is called a “word” • Numbered 0 to 31: $0, $1, …, $31 • Assembler names • $t0, $t1, …, $t9 for temporary values (registers 8 – 15, 24 – 25) • $s0, $s1, …, $s7 for saved variables (registers 16 – 23) 5 32 Reg. # for Read port 0 Data read from read port 0 5 Reg. # for Read port 1 5 Reg. # for Write port 0 32 Data read from read port 1 32 Write data for write port Write enable Arithmetic operations can only read from registers!!! Full credit of these slides is given to Dr. Mohammad Sinky

  10. MIPS Arithmetic Operands – Registers • Design Principle 2: Smaller is Faster • The desire for speed is the reason that MIPS has 32 registers rather than many more • Large # of registers • May increase the CCT • More bits in the instruction format Full credit of these slides is given to Dr. Mohammad Sinky

  11. MIPS Arithmetic Using Register Operands • Consider the C code:f = (g + h) – (i + j); • f $s0, g  $s1, h  $s2,i  $s3, j  $s4 • So compiled MIPS code is:add $t0, $s1, $s2add $t1, $s3, $s4sub $s0, $t0, $t1 • Equivalently*:add $8, $17, $18add $9, $19, $20sub $16, $8, $9 Remember: Arithmetic operations can only read from registers!!! * $t0 = $8, $t1 = $9 $s0 = $16, $s1 = $17, $s2 = $18, $s3 = $19, $s4 = $20 Full credit of these slides is given to Dr. Mohammad Sinky

  12. Memory Operands Full credit of these slides is given to Dr. Mohammad Sinky

  13. Memory Operands • Simple variables that contain single data element are stored in registers • However, main memory is used for composite data: Arraysand structures • Arithmetic operations occur only on registers • Arithmetic operations can not be performed on data in memory • Processor can only hold a small amount of data in registers. • Memory can hold billions (4GB) Full credit of these slides is given to Dr. Mohammad Sinky

  14. Memory Operands: Data Transfer • Data transfer instructions: instructions that transfer data between memory and registers • Recall that arithmetic instructions can only work on data from registers. • Need instructions to transfer data to and from memory. 32 bits (1 word) Memory[2] = 10 Full credit of these slides is given to Dr. Mohammad Sinky

  15. Memory Operands: Data Transfer • Load and store instructions are called data transfer instructions • Loadinstruction copies data from memory to a register • Store instruction copies data from a register to memory • Load: • lw $s0, 16($s2) • lwstands for load word • Store: • sw $s0, 16($s2) • swstands for store word Memory address= const. portion + content of register Full credit of these slides is given to Dr. Mohammad Sinky

  16. Memory Operands: Byte Addressing • Byte addressing: access individual bytes (8 bits) • Memory is byte addressed: each address identifies an 8-bit byte • Address of a word (32-bits) matches the address of one byte within a word. Address of sequential words differs by 4 Memory[8] = 10 Full credit of these slides is given to Dr. Mohammad Sinky

  17. Memory Operands: Byte Addressing • in MIPS for proper address computation, an array index must be multiplied by 4 • Suppose we want to access array A index 4 (or A[4])  for compiled instruction, address will be 4x4 + base addr. = 16 + base addr. • lw, $s0, 16($s2) • sw, $s0, 16($s2) Contents of memory to be loaded in register $s0 . . . . 24 A[4] offset A[3] 20 + A[2] 16 Contents of $s0 to be stored in memory Memory 12 A[1] Base address A[0] 8 4 . . . . Full credit of these slides is given to Dr. Mohammad Sinky

  18. Memory Operands: Compilation Example For more illustration • Compilation example: • A[12] = h + A[8]; • Variable h  $s2, base address of Array A  $s3 • Compiling code: • Load THEN add:lw $t0, 32($s3)add $t0, $s2, $t0 • Now store back to A[12]sw $t0, 48($s3) Base address For example: A[4] is at address = (4x4)10 + 0x10007000 = 0x00000010+0x10007000 = 0x10007010 Note: 0x is a notation for hexadecimal form Full credit of these slides is given to Dr. Mohammad Sinky

  19. Memory Operands: Byte Order • Computers order data differently based on two conventions: • Big-endian • Little-endian • In both formats, the most significant byte (MSB) is on the left and the least significant byte (LSB) is on the right 32-bits 1 word • How to number bytes within a word? • Little-endian: byte numbers start at the little (least significant) end • Big-endian: byte numbers start at the big (most significant) end • Word address is the same for big- or little-endian Big-endian Little-endian MIPS: Big-endian Full credit of these slides is given to Dr. Mohammad Sinky

  20. Memory Operands: Byte Order Example: Full credit of these slides is given to Dr. Mohammad Sinky

  21. Constant or Immediate Operands Full credit of these slides is given to Dr. Mohammad Sinky

  22. Constant or Immediate Operands • In many cases constants are used: • e.g increment array indexn = 0;A[n] = L*2;n = n+1;A[n] = L*3; • For example: to add the constant 4 to register $s3 we would need to load the constant firstlw$t0, AddrConstant4($s1)add $s3, $s3, $t0 • To avoid load instruction, MIPS offer quick add inst.add immediateor addi:addi $s3, $s3, 4 • No sub immediate (subi) instruction! (use –ve constant) No memory access! much faster and use less energy Full credit of these slides is given to Dr. Mohammad Sinky

  23. Review of Binary Numbers Full credit of these slides is given to Dr. Mohammad Sinky

  24. Review of binary numbers: unsigned • Computers represent numbers by binary digits or bits (Base 2) • To compute value of number in any base: • Example (4-bit value): Full credit of these slides is given to Dr. Mohammad Sinky

  25. MIPS 32-bit word • Numbered from right to left • We have possible combinations • Smallest value = 0 • Largest value = • Overflow for unsigned numbers: value larger than 4,294,967,295 most significant bit (MSB) least significant bit (LSB) Full credit of these slides is given to Dr. Mohammad Sinky

  26. Signed Numbers: Two’s complement • Negative number: MSB = 1 • Positive number: MSB = 0 • Or for 32-bit number Full credit of these slides is given to Dr. Mohammad Sinky

  27. Signed Numbers: Two’s Complement 32 bits 2 Range Full credit of these slides is given to Dr. Mohammad Sinky

  28. Signed Numbers: Two’s complement • Convert the 32-bit two’s complement number to decimal 1111 1111 1111 1111 1111 1111 1111 0000two • Two ways: • Direct computation: • Negate then compute: 0000 0000 0000 0000 0000 0000 0001 0000 so original value was Full credit of these slides is given to Dr. Mohammad Sinky

  29. Signed Numbers: Sign Extension • Sign Extension: convert two’s complement value of n bits to more than n bits • How? • Repeat MSB ONLY • Example  16-bit value of 2ten and -2ten to 32-bit value • For 2ten:0000 0000 0000 0010two  0000 0000 0000 0000 0000 0000 0000 0010two • For -2ten:1111 1111 1111 1110two  1111 1111 1111 1111 1111 1111 1111 1110two Full credit of these slides is given to Dr. Mohammad Sinky

  30. Representing Instructions in the Computer Full credit of these slides is given to Dr. Mohammad Sinky

  31. Representing Instructions in the Computer • Instructions are simply high and low electronic signals (0’s and 1’s) and are represented as numbers • Field: part of an instruction • Instruction format: layout (organization of fields) of an instruction • All MIPS instructions are 32 bits long • Machine language: numeric version of instruction • Machine code – a sequence of instructions Remember $s0 – $s7 : registers 16 – 23 $t0– $t7: registers 8 – 15 $t8 – $t9 : registers 24-25 Ex. add $t0, $s1, $s2 This is called R-format instruction format Unused in this inst. Second field (17) = $s1 First and last fields (0,32) tell MIPS computer this is addition 32 0 18 8 0 17 Third field (18) = $s2 fields Fourth field (8) = $t0 Full credit of these slides is given to Dr. Mohammad Sinky

  32. Representing Instructions in the Computer • Instructions are simply high and low electronic signals (0’s and 1’s) and are represented as numbers 6 bits 6 bits 5 bits 5 bits 5 bits 5 bits 32 bits 10001 10010 01000 00000 32 100000 0 000000 17 18 8 0 All MIPS instructions 32-bits (1 word) Full credit of these slides is given to Dr. Mohammad Sinky

  33. MIPS Fields • op: opcode field – denotes the operation and format of instruction • rs: The first register source operand • rt: The second register source operand • rd: The register destination operand. It gets the result of the operation • shamt: shift amount • funct: Function. Called the function code which selects the type of operation op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Full credit of these slides is given to Dr. Mohammad Sinky

  34. Design Considerations • What happens when an instruction needs longer fields than what is available? lw $s0, 16($s1) • Example: load word • If the address were to use one of the 5-bit fields in the format above, it would be limited to 32 • This constant is used to select elements from arrays or data structures • it often needs to be much larger than 32. This 5-bit field is too small to be useful • we have a conflict between the desire to keep all instructions the same length and the desire to have a single instruction format • This leads to Design Principle 3: Good design demands good compromise • MIPS compromise: keep all instructions same length (32-bits) • So, must have different types of instructions(Different formats complicate decoding, but allow 32-bit instructions uniformly) op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Full credit of these slides is given to Dr. Mohammad Sinky

  35. Instruction Types (Formats) • R-type or R-format (R stands for register) • I-type or I-format (I stands for immediate) op op rs rs rt rt constant or address rd shamt funct 6 bits 6 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 16 bits 6 bits Full credit of these slides is given to Dr. Mohammad Sinky

  36. I-format instructions • 16-bit address allows load word (lw) to load a word within 32,768 bytes of address in base register rs. • Also add immediate (addi) uses constants no larger than ±215. • Load word example • lw $t0, 32($s3) • 19 (for $s3)  rs , 8 (for $t0)  rt , 32  address field • Note change in meaning of rt as a destination register because it receives result of load op 19 8 32 6 bits 5 bits 5 bits 16 bits Full credit of these slides is given to Dr. Mohammad Sinky

  37. MIPS Instruction Encoding The formats are distinguished by the values in the first field: Each format is assigned a distinct set of values in the first field (op) so that the hardware knows whether to treat the last half of the instruction as three fields (R-type) or as a single field (I-type). Full credit of these slides is given to Dr. Mohammad Sinky

  38. Translating MIPS Assembly Language Into Machine Language • C codeA[300] = h + A[300] (The base of the array$t1, h $s2) • compiled to:lw $t0, 1200($t1)# Temporary reg $t0 gets A[300]add $t0, $s2, $t0 # Temporary reg $t0 gets h + A[300]sw $t0, 1200($t1)# Stores h + A[300] back into A[300] lw add sw $t0: register 8 $t1: register 9 $s2: register 18 Full credit of these slides is given to Dr. Mohammad Sinky

  39. A Summary of the MIPS Machine Language • Table displays the 5 MIPS instructions we have taken so far Full credit of these slides is given to Dr. Mohammad Sinky

  40. Logical Operations Full credit of these slides is given to Dr. Mohammad Sinky

  41. Logical Operations Useful for extracting and inserting groups of bits in a word Full credit of these slides is given to Dr. Mohammad Sinky

  42. Logical Operations: Shifts • shift left logical (sll)sll $t2, $s0, 4 # reg $t2 = reg $s0 << 4 bits • R-format • Op = 0 and funct = 0 • Shift left by i digits is equivalent to multiplication by 2i i.e. multiply by 2, 4, 8, …. op rs rd rt shamt funct 0 0 16 10 4 0 unused Full credit of these slides is given to Dr. Mohammad Sinky

  43. Logical Operations: Shifts • shift right logical (srl)srl $t2, $s0, 4 # reg $t2 = reg $s0 >> 4 bits • R-format • Op = 0 and funct = 2 op rs rd rt shamt funct 0 0 16 10 4 2 unused (srl: Division by 2i Unsigned only) (sra=shift right arithmetic: signed #’s) Full credit of these slides is given to Dr. Mohammad Sinky

  44. Logical Operations: AND, OR, NOR • AND (op = 0, funct = 36)and $t0, $t2, $t1 • OR (op = 0, funct = 37)or $t0, $t2, $t1 • NOR (op = 0, funct = 39)nor $t0, $t2, $t1 Useful for masking bits rs rs rs rd rd rd op op op rt rt rt shamt shamt shamt funct funct funct 000000 000000 000000 01010 01010 01010 01001 01001 01001 01000 01000 01000 00000 00000 00000 100111 100100 100101 Useful for combining bit fields Useful for inverting bits MIPS does not include NOT! Reason: To keep with three operand format. So, use NOR to implement NOT Remember $s0 – $s7 : registers 16 – 23 $t0– $t7: registers 8 – 15 $t8 – $t9 : registers 24-25 Full credit of these slides is given to Dr. Mohammad Sinky

  45. Logic Operations: Immediate • Recall Immediate format • AND Immediate (op = 12)andi$t0, $t1, 255 • OR Immediate(op = 13)ori$t0, $t1, 255 001100 001101 op 01001 01001 rs rt 01000 01000 constant or address 0000000011111111 0000000011111111 6 bits 5 bits 5 bits 16 bits rs op rt constant rs op rt constant No immediate version of NOR Reason: Very rare to use with constant Remember $s0 – $s7 : registers 16 – 23 $t0– $t7: registers 8 – 15 $t8 – $t9 : registers 24-25 Full credit of these slides is given to Dr. Mohammad Sinky

  46. Logic Operations: Implementing NOT • To keep 3 operand format, use NOR to implement NOT • a NOR b = (a OR b)’ • Simply set b = 0: • (a OR 0)’ = (a)’ = NOT A • Note that register 0 is denoted by $zero • Holds the constant 0 • Cannot be overwritten • nor $t0, $t1, $zero Full credit of these slides is given to Dr. Mohammad Sinky

  47. Branching • Execute instructions out of sequence • Types of branches: • Conditional • branch if equal (beq) • branch if not equal (bne) • Unconditional • jump (j) • jump register (jr) • jump and link (jal) Full credit of these slides is given to Dr. Mohammad Sinky

  48. Conditional Branches • Branch to a labelled instruction if a condition is true • Otherwise, continue sequentially • Branch if equal • beq $s2, $s3, L1 • if ($s2 == $s3), branch to instruction labelled L1 • Opcode=4ten • Branch if not equal • bne $s2, $s3, L1 • if ($s2 != $s3), branch to instruction labelled L1 • Opcode=5ten 0 4 8 . . . 40 44 START: add $s1, $s2, $s3 lw $t0, 32($t1) sub $s1, $s1, $t0 . . . OTHER: sw $t0, 0($t1) or $s1, $s2, $s3 . . . op rs rt constant or address labels Full credit of these slides is given to Dr. Mohammad Sinky

  49. op address 26 bits 6 bits Unconditional Branches (Jump) • No conditions must be met • Jump • j L1 • Jump to instruction labelled L1 • This instruction is from a new format called the J-format • To be covered in detail later J-format Full credit of these slides is given to Dr. Mohammad Sinky

  50. Conditional Branches: Compiling if statements • C code:if (i == j) f = g + h; else f = g – h; • f, g, h, i, j variables  $s0 through $s4 • Compiled MIPS code:bne $s3, $s4, Else add $s0, $s1, $s2 j Exit Else: sub $s0, $s1, $s2 Exit: unconditional branch Full credit of these slides is given to Dr. Mohammad Sinky

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