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Combinational Logic and Verilog. XORs and XNORs. XOR. XOR gates. Cascading XOR gates. Parity Generation. 74x280 9-bit odd/even parity generator. Verilog for 9-input parity checker. Structural Verilog for 74x280 parity checker. Parity generation and checking for a 8-bit-wide memory.
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Error-correcting circuit for a 7-bit Hamming Code Exors for parity see next slide
Behavioral Verilog for Hamming error correction This is the same code as in last slide
74x85 4-bit comparator Output of A less than B Input of A less than B Input of A equal B output of A equal B Input of A greater than B 4-bit of A and 4-bit of B Output of A greater than B
12-bit comparator using 74x85 Iterative circuit
Five versions of Verilog comparator Verilog for 74x85
74x682 8-bit comparator EQ and Greater
Arithmetic Conditions (predicates) derived from 74x682 outputs