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DMT 231 / 3 ANALOGUE ELECTRONICS

DMT 231 / 3 ANALOGUE ELECTRONICS. Lecture I Introduction to Field Effect Transistors. FIELD EFFECT TRASISTOR (FET). ADVANTAGES OF FET TYPES OF FET & ITS OPERATION. FET Advantages. Voltage-controlled amplifier : input impedance very high

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DMT 231 / 3 ANALOGUE ELECTRONICS

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  1. DMT 231 / 3 ANALOGUE ELECTRONICS Lecture I Introduction to Field Effect Transistors

  2. FIELD EFFECT TRASISTOR (FET) ADVANTAGES OF FET TYPES OF FET & ITS OPERATION

  3. FET Advantages Voltage-controlled amplifier: input impedance very high Low noise output: useful as preamplifiers when noise must be very low because of high gain in following stages Better linearity: distortion minimized Low inter-electrode capacity: at high frequency, inter-electrode capacitance can make amplifier work poorly. FET desirable in RF stages

  4. Types of FET FET

  5. Junction FET (JFET) ohmic contact Structure n-channel p-channel Symbol

  6. Metal-Oxide-Semiconductor MOS (MOSFET) DEPLETION p n p dielectric metal ENHANCEMENT p n p n-channel p-channel

  7. JFET Operation depletion region VDD  VDD VGG • Gate-source is reversed-biased •  zero current at gate • IDS flow through the channel and determined by the width of depletion region and the width of the channel

  8. MOSFET Operation electron inversion layer G G S D S D SS SS • No voltage applied to gate • Current is zero • +ve voltage applied to gate • Electron inversion layer is created • Current is generated between source and drain

  9. FET BIASING JFET BIAS CIRCUITS Self-bias Voltage-divider bias MOSFET BIAS CIRCUITS Voltage-divider bias Drain-feedback bias

  10. Equivalence biasing of JFET & BJT JFET BJT <==> <==> <==>

  11. JFET Bias Circuits - Self-Bias +VDD RD IG = 0 RS RG

  12. JFET Bias Circuits - Voltage-divider Bias +VDD R1 RD ID VG R2 RS

  13. MOSFET Bias Circuits - Voltage-divider Bias +VDD R1 RD R2

  14. MOSFET Bias Circuits - Drain-Feedback Bias +VDD RD RG IG = 0

  15. LOAD LINE SELF-BIASED JFET VOLTAGE-DIVIDER BIAS JFET

  16. +VDD 9V RD 2.2K RG 10M RS 680 LOAD LINE- SELF-BIASED JFET Example Determine the Q-point for the JFET circuit. The transfer characteristic curve is given in the figure.

  17. For ID=0, VGS=-IDRS=(0)(680)=0V From the curve, IDSS=4mA; so ID=IDSS=4mA VGS=-IDRS=-(4m)(680)=-2.72V ID (mA) 4 IDSS ID=2.25mA VGS=-1.5V Q 2.25 -VGS (V) -6 VGS(off) -2.72 -1.5

  18. +VDD 8V LOAD LINE - VOLTAGE-DIVIDER BIAS JFET Example Determine the Q-point for the JFET circuit. The transfer characteristic curve is given in the figure. RD 680 R1 2.2M R2 2.2M RS 3.3K

  19. ID (mA) 12 IDSS Q 1.8 -VGS (V) VGS (V) -3 VGS(off) -1.8 4 1.2 For ID=0, For VGS=0, ID=1.8mA VGS=-1.8V

  20. +VDD 6V ID (mA) RD 820 IDSS = 5mA RG 10M RS 330 -VGS (V) VGS(off)=-3.5 EXERCISES (Load Line JFET) 1. Determine the Q-point for the JFET circuit. The transfer characteristic curve is given in the figure.

  21. +VDD 12V RD 1.8K R1 3.3M R2 2.2M RS 3.3K EXERCISES (Cont) 2. Determine the Q-point for the JFET circuit. The transfer characteristic curve is given in the figure. ID (mA) IDSS = 5mA -VGS (V) VGS(off)=-4V

  22. FET CHARACTERISTICS JFET MOSFET

  23. JFET CHARACTERISTICS • DRAIN CHARACTERISTIC VP=|VGS (off)|

  24. JFET CHARACTERISTICS • TRANSFER CHARACTERISTIC

  25. JFET DATA SHEET For MMBF5459 VGS (off) = -8.0V (max) IDSS = 9.0 mA (typ.)

  26. MOSFET CHARACTERISTICS • TRANSFER CHARACTERISTIC (Depletion MOSFET)

  27. MOSFET CHARACTERISTICS • TRANSFER CHARACTERISTIC (Enhancement MOSFET) K in formula can be calculated by substituting data sheet values ID(on) for ID and VGS at which ID(on) is specified for VGS

  28. E-MOSFET DATA SHEET ID(on) = 75 mA (minimum) at VTN = 0.8 V and VGS = 4.5V

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