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Dynamic Translator: Firmware-Scheduled VLIW Processor. CSE 560: Team BooY@ Saurabh Gayen Brandon Heller. Table of Contents . Dynamic Translation Our Implementation Software Firmware Hardware Integrated System Conclusions Questions. What is a Dynamic Translator?. start.
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Dynamic Translator:Firmware-Scheduled VLIW Processor CSE 560: Team BooY@ Saurabh Gayen Brandon Heller
Table of Contents • Dynamic Translation • Our Implementation • Software • Firmware • Hardware • Integrated System • Conclusions • Questions
MIPS programmer Dynamic Translation : How it fits in • MIPS External ISA • VLIW Internal ISA • Dynamic Translator MIPS processor Dynamic Translator VLIW processor
Dynamic Translation: Types • Software • Java VM, VMWare, Dynamo • Codesigned • Crusoe, Efficeon • Hardware • Pentium, Athlon
Codesigned DT Advantages • hardware/software flexibility • power efficiency • dynamically optimized code • ISA independence
Implementation • Software Toolchain • C input • MIPS binary output • VLIW binary output • Firmware • basic block translator • Hardware • VLIW support • translator support
MIPS binary C Code GCC Compiler Perl Assembler MIPS asm VLIW binary Software Toolchain ... .type swap,@function swap: .ent swap swap: .frame $sp,72,$31 .mask 0x90070000,-8 .fmask 0x00000000,0 .cpload $25 subu $sp,$sp,72 ... ... void swap(int* p, int* q){ int temp; temp = *p; *p = *q; *q = temp; } ... 200 00100000000001000000000000000000 204 00100000000000010000000000000001 208 00100000000000100000000000000001 212 10000000000000000000000000000000 216 10000000000000000000000000000000 220 10000000000000000000000000000000 224 …
translate Translate Block Execute Block execute enter translator execute next instruction (VLIW) loop read next instruction (MIPS) write next instruction (VLIW) loop Firmware initialize initialize branch/jump? branch/jump? translate mode execute mode
Bundle format : Functionality : • Translate • Copy instructions into correct slot • Fill other slot with nop • Repeat copies until end of basic block • Execute • translated block • Repeat until end of basic block MEM / BR ALU Firmware MIPS code firmware VLIW code … addi $13,$13,1 sw $10,16($0) addi $14,$14,1 sw $11,20($0) sw $12,24($0) sw $15,28($0) nop nop nop … … addi $13,$13,1 nop nop sw $10,16($0) addi $14,$14,1 nop sw $11,20($0) nop nop sw $12,24($0) nop sw $15,28($0) nop nop nop nop nop nop …
Hardware overview • VLIW Conversion • Memory Mapping • DT Conversion
Hardware : Memory Map • internal view • external view data_mem (0x0000 – 0x7FFF) memory (0x0000 – 0x7FFF) MIPS code MIPS program data vliw_rom (0x8000 – 0xBFFF) data VLIW firmware vliw_mem (0xC000 – 0xFFFF) VLIW code translations firmware data
Initialization VLIW Memory Data Memory 0x00 add 0x04 sw 0x08 j Data Memory VLIW ROM VLIW ROM … <firmware> … MIPS code Firmware
Translation : alu VLIW Memory Data Memory 0x00 add 0x04 sw 0x08 j VLIW Memory 0x00 add VLIW Memory 0x00 add nop Data Memory 0x00 add 0x04 sw 0x08 j add nop
Translation : mem VLIW Memory 0x00 add nop 0x08 nop VLIW Memory 0x00 add nop Data Memory 0x00 add 0x04 sw 0x08 j VLIW Memory 0x00 add nop 0x08 nop sw sw nop
Translation : br VLIW Memory 0x00 add nop 0x08 nop sw Data Memory 0x00 add 0x04 sw 0x08 j VLIW Memory 0x00 add nop 0x08 nop sw 0x10 j VLIW Memory 0x00 add nop 0x08 nop sw 0x10 j nop j nop
Execution : alu VLIW Memory 0x00 add nop 0x08 nop sw 0x10 j nop PC 0xC000 add nop
Execution : mem VLIW Memory 0x00 add nop 0x08 nop sw 0x10 j nop PC 0xC008 nop sw
Execution : branch VLIW Memory 0x00 add nop 0x08 nop sw 0x10 j nop PC 0x8000 PC 0xC010 firmware_loc j nop raw_loc
Conclusions • We have implemented a complete system to do dynamic translation. • We need environment in which we can more easily codesign.
Future work • Smarter translator • Profiling • Translation cache • No known open platform for dynamic translation research • Wash U should build one!