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VDK and HAPS. Synopsys Hybrid platform Decreasing your T2M by enabling early software design. Uri Shkolnik Zoro Solutions Ltd. June 2014 SNUG Israel. Agenda. About Zoro E xperience using Virtualizer VDK for ROM development DW_USB3 driver virtualization and emulation
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VDK and HAPS Synopsys Hybrid platform Decreasing your T2M by enabling early software design Uri Shkolnik Zoro Solutions Ltd. June 2014 SNUG Israel
Agenda About Zoro Experience using Virtualizer VDK for ROM development DW_USB3 driver virtualization and emulation Experience deploying Hybrid prototyping VDK↔HAPS
About Zoro Pre-Silicon Software development • Software development using simulation (using tools by Synopsys, and additional EDA companies). • Emulation, virtual and hybrid platforms (HAPS, Virtualizer VDK, others) • Software ASIC verification • Proven experience with ARC, ARM, CEVA, MIPS, Tensilica • ROM development, including RTOS, USB, SDIO, Security (boot, authentication) and additional ROM stacks • Zoro offers turnkey projects, outsourcing and consulting • Synopsys Partner (Virtual Prototyping, ARC, DW IP)
Traditional SoC Design Approach VLSI SW
T2M SoC Design Approach VLSI SW
Based on a True Story….. • Israeli Fabless Company • SoC Design Start, ARM Cortex w/USB3.0 – Dec 12 • Hardware prototype (FPGA which contains ARM, USB3, memories, UART), to be ready by Mar. 13 (halted, NC) • Emulation, took long time and many efforts, single resource for both VLSI & SW, unsuitable for many software tasks – Summer 13 • Decision to deploy Virtualizer VDK, bare metal – Sep 13 (SW engineers only) • Decision to deploy Virtualizer VDK & HAPS USB3, bare metal and Linux – Dec 13 (done by SW engineers only). Platform runs Linux with good speed
Software Developer’s View Lauterbach GDB/DDD ARM DS-5/RVDS Synopsys System SW Debug Simulation & Debug Scripting Instant, OS-aware, non-intrusive, stop mode debugging Virtual IO Virtualizer Multi-core Debugger Server Virtualizer Developer Kit (VDK) Simulation of a hardware device/SoC* USB Host USB MMC Host MMC ARM Cortex A I2C/SPI Sensors, etc. ARM Cortex R GMAC Ethernet ARM Cortex M LCD Touch panel Unmodified binary SW stack images E.g. bootROM + Linux kernel + Linux filesystem *Simulation using industry standard based Transaction Level Models (TLM)
Synopsys Tools for VDKs Visibility beyond traditional software debugging Extend through scripting Inspect registers & signals Explore platform Break on signals, registers, SW, screen contents Script everything
Vertical HW/SW integration: Middleware & Drivers Multi-layer, multi-core, multi-tool SW debugging GDB: Sensor middleware – Cortex A GDB: Sensor driver – Cortex A Lauterbach: Sensor firmware– Cortex M One click connection of a debugger to any thread, on any core, in any SW layer, in non-intrusive stop-mode ! Stop mode Stop mode Stop mode Virtualizer Multi-core Debugger Server VP Linux awareness plugin Statically loaded Dynamically loaded Statically loaded Firmware symbols Kernel Symbols - vmlinux Symbols libsensors.so See article: Android hardware/software design using virtual prototypes http://www.embedded.com/design/prototyping-and-development/4399520
From VDK to Hybrid VDK-HAPS ARM Cortex A5 w/ DW-USB3 SoC OS-less ROM and Embedded Linux Firmware
Popular ASIC Prototyping Methods Software Stack Certify Synplify Premier Synopsys Virtual Prototype Identify Virtual (Pre RTL) FPGA-Based (RTL) SystemC/TLM ASICRTL SynopsysVirtualizer SynopsysHAPS Systems Project Timeline
Integrated Hybrid Prototyping Solution Best of Both Worlds Synopsys Hybrid Prototype Solution Generic Interrupt Controller Cortex-A15 MPCore Cortex-A7 MPCore HAPS Systems FPGA-based ASIC prototype Validate HW/SW operation at near real-time speed Virtualizer SystemC/TLM–based virtual prototype Start software development before hardware is available Data Exchange L2 cache controller Interconnect Embedded memories UARTs Color LCD Controller DesignWare USB 3.0 GPIOs RTC Timers DesignWare Ethernet Keyboard / Mouse Interface Generic Battery Watchdog Interface AMBA UMRBus
The Hybrid prototyping:Solution Strengths • Virtualization enables rapid setup, simple development and debugging • FPGA enables high confidentiality with RTL/IP. • The Hybrid setup eases software design comparing to simulation and/or full emulation solution (FPGA, Veloce). • The Hybrid solution provides simple environments (and transactions between) bare metal, RTOS and eLinux. • HAPS provides solution for specific IP/RTL verification and software integration (which cannot be done by purely virtual platform like the VDK/Xplorer, such as PHY) • The Hybrid setup results with longer validation time for both VLSI and SW teams
Validation with Hybrid Setup VLSI SW Additional Validation Time
Software Environments Bare Metal Embedded Linux FreeRTOS