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CMS Tracker FED CMS Tracker Two Weekly Meeting Design Update Rob Halsall et al 18 July 2001 RAL

CMS Tracker FED CMS Tracker Two Weekly Meeting Design Update Rob Halsall et al 18 July 2001 RAL. Uni-directional Point to Point connections Minimise I/O Signals Minimise Component Count/Types High Integration Level Cost Sensitive Virtex II Digitally Controlled Impedance

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CMS Tracker FED CMS Tracker Two Weekly Meeting Design Update Rob Halsall et al 18 July 2001 RAL

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  1. CMS Tracker FEDCMS Tracker Two Weekly MeetingDesign Update Rob Halsall et al18 July 2001RAL

  2. Uni-directional Point to Point connections • Minimise I/O Signals • Minimise Component Count/Types • High Integration Level • Cost Sensitive • Virtex II • Digitally Controlled Impedance • Double Data Rate I/O • Digital Clock Manager • High Gate Count

  3. CMS Tracker FED96 ADC Module 1.5V Temp Sense 5V I2C FLASH ?V 3V 2.5V 5V 3V 2.5V 1.5V 1 1 1 Opto Rx Prog Delay 1 1 Dual ADC I2C FE 1 FPGA config FPGA Synch & Processing -5V VME VME Interface SBC ASIC BScan PD Array 6 12 way FR 4 Prog Delay BSCAN Dual ADC 12 FPGA FPGA FPGA 2 Temp Sense I2C SSRAM ?V X DAQ Readout & Synch Control TTS CLOCK FPGA Temp Sense I2C 85 1 1 clk40 43 Prog Delay Opto Rx 8 8 Dual ADC 9 FPGA FE 8 TTCrx Synch & Processing ASIC ASIC PD Array 6 12 way FR 48 4 Prog Delay 96 Dual ADC FPGA FPGA Temp Sense I2C TTC FPGA

  4. CMS Tracker FED System OverviewBoard Layout FED DAQ/Test VME FPGA POWER JTAG RO FPGA TTS EXT CLOCK DAQ PMC

  5. CMS Tracker FEDSystem Timing 256+12 #2234 Header Data ADC Output Frame Sync Out Auto Sync(s) Status Message Frame Sync In Handshake Message Readout Sync Out #2233 Processed Message #2220 #2221 Readout Message Readout Message Readout Sync In #2219 #2220 #2221 Data Burst Data Burst Data Burst Data

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