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Experiment 6

Experiment 6. AES Look-up Tables Memory Testing Sorting. AES - Rijndael. Advanced Encryption Standard Contest. June 1998. Round 1. 15 Candidates from USA, Canada, Belgium, France, Germany, Norway, UK, Isreal, Korea, Japan, Australia, Costa Rica. Security. Software efficiency.

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Experiment 6

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  1. Experiment 6 AES Look-up Tables Memory Testing Sorting

  2. AES - Rijndael

  3. Advanced Encryption Standard Contest June 1998 Round 1 15 Candidates from USA, Canada, Belgium, France, Germany, Norway, UK, Isreal, Korea, Japan, Australia, Costa Rica Security Software efficiency August 1999 Round 2 5 final candidates Security Mars, RC6, Rijndael, Serpent, Twofish Hardware efficiency October 2000 1 winner: Rijndael Belgium

  4. External format of the AES algorithm plaintext block 128 bits AES key 128, 192, 256 bits 128 bits ciphertext block

  5. Iterative cipher Round Key[0] Initial transformation i:=1 Round Key[i] Cipher Round i:=i+1 #rounds times i<#rounds? Round Key[#rounds+1] Final transformation

  6. RoundKey[0] AddRoundKey i:=1 SubBytes AES encryption ShiftRows i:=i+1 MixColumns Nr-1 times RoundKey[i] AddRoundKey i<Nr-1? SubBytes ShiftRows RoundKey[Nr] AddRoundKey

  7. Order of bytes within input, internal state, and output arrays

  8. SubBytes S-box b0,0 b0,1 b0,2 b0,3 a0,0 a0,1 a0,2 a0,3 bi,j ai,j b1,0 b1,1 a1,2 b1,3 a1,0 a1,1 a1,2 a1,3 b2,0 b2,1 b2,2 b2,3 a2,0 a2,1 a2,2 a2,3 b3,0 b3,1 b3,2 b3,3 a3,0 a3,1 a3,2 a3,3

  9. SubBytes Look-up Table

  10. ShiftRows no shift a c d a c d b b cyclic shift left by C1=1 f g e h e g f h cyclic shift left by C2=2 i j k l i j k l cyclic shift left by C3=3 n m o p o p m n

  11. MixColumns 2 3 1 1 1 2 3 1 1 1 2 3 3 1 1 2 a0,j b0,j b0,0 b0,1 a0,2 b0,3 a0,0 a0,1 a0,2 a0,3 a1,j b1,0 b1,1 a1,2 b1,3 b1,j a1,0 a1,1 a1,2 a1,3 b2,0 b2,1 a2,2 b2,3 a2,0 a2,1 a2,2 a2,3 a2,j b2,j b3,1 a3,2 b3,3 b3,0 a3,0 a3,1 a3,2 a3,3 a3,j b3,j High diffusion A difference in 1 input byte propagates to all 4 output bytes A difference in 2 input bytes propagates to at least 3 output bytes

  12. AddRoundKey a0,0 a0,1 a0,2 a0,3 b0,0 b0,1 b0,2 b0,3 k0,0 k0,1 k0,2 k0,3 a1,0 a1,1 a1,2 a1,3 b1,0 b1,1 b1,2 b1,3 k1,0 k1,1 k1,2 k1,3 + = a2,0 a2,1 a2,2 a2,3 b2,0 b2,1 b2,2 b2,3 k2,0 k2,1 k2,2 k2,3 a3,0 a3,1 a3,2 a3,3 b3,0 b3,1 b3,2 b3,3 k3,0 k3,1 k3,2 k3,3 • simple bitwise addition (xor) of round keys

  13. Rijndael Animation by Enrique Zabala from Uruguay http://teal.gmu.edu/courses/ECE746/viewgraphs_S08/Rijndael_ingles_2004.exe

  14. S-box Based Basic Iterative Architecture Data input round key Encryption circuit Decryption circuit SubBytes & InvSubBytes R1 ShiftRows InvShiftRows round key MixColumns round key round key InvMixColumns Data output

  15. Memory Testing

  16. Memory cell array faults (1) One-cell faults Simple detection sequence Definition Cases Name i=x; x is not possible stuck-at-0 (x=0) stuck-at-1 (x=1) Wi1 Ri Wi0 Ri Stuck-at transition 01 (x=0) transition 10 (x=1) (i=x) and Wix => i=x Wi0 Wi1 Ri Wi1 Wi0 Ri Transition

  17. Memory cell array faults (2) Two-cell coupling faults Simple detection sequence Cases Definition Name j=> i (y=0, x=0) j=> i (y=1, x=1) j=>  i (y=0, x=1)  j=>i (y=1, x=0) (j=y, i=x) and Wjy => i: xx {Wi0 Wj0} Wj1 Ri {Wj1 Wi1} Wj0 Ri {Wj0 Wi1} Wj1 Ri {Wj1 Wi0} Wj0 Ri Idempotent coupling symmetric fault if x=y asymmetric fault if xy {Wi Wj0} Wj1 Ri {Wj1 Wi} Wj0 Ri j=> i (y=0) j=> i (y=1) (j=y) and Wjy => i: xx (i is inverted) Inversion coupling (toggling)

  18. Detection Sequence Notation (w1) (r1, w0) (r0, w1, r1) MAX w1 w1 ….. w1 w1 w1 r1 w0 r1 w0 ……. r1 w0 r1 w0 r1 w0 r0 w1 r1 r0 w1 r1 ……. r0 w1r1 r0 w1 r1 r0 w1 r1 j i 0 i<j

  19. Functional RAM Chip Tests Tests for stuck-at, transition, and coupling faults Marching tests 1. Test-US MATS: { (w0) (r0, w1) (r1) } MATS+: { (w0) (r0, w1) (r1, w0) } 2. Test-UT Marching 1/0: { (w0) (r0, w1, r1) (r1, w0, r0) (w1) (r1, w0, r0) (r0, w1, r1) } MATS++: { (w0) (r0, w1) (r1, w0, r0) } 3. Test-UCin March-X: { (w0) (r0, w1) (r1, w0)  r0 } 4. Test-Ucid March C-: { (w0) (r0, w1) (r1, w0)  (r0, w1)  (r1, w0) (r0) }

  20. Functional RAM Chip Tests Traditional tests 1. Zero-one (solid pattern, memory scan) {(w0) (r0) (w1) (r1)} Complexity:O(n) 2. Checkerboard Complexity:O(n) 3. GALPAT (GALloping PATtern) and Walking 1/0 Complexity:O(n2) 4. GALCOL, GALROW Complexity:O(nn)

  21. Walking 1/0 Test for d:= 0 to 1 do begin for i:= 0 to n-1 do M[i] := d; for base_cell := 0 to n-1 do begin M[base_cell] := not d; Call READ_ACTION; M[base_cell] := d; end; end; function READ_ACTION begin for cell := 0 to n-1 (base_cell_excluded) do begin if(M[cell] != d) then output(cell) end; if(M[base_cell] != not d then output (base_cell) end;

  22. Memory Testing Test Generator 1 RAM 1 Test Generator 2 RAM 2 7-segment displays Test Generator 3 I/O Interface Global Controller RAM 3 Joystick . . . . . . . . . . . . . . . . . . . . . . . . . . . Test Generator 29 RAM 29 Test Generator 30 RAM 30

  23. Memory Testing with Fault Emulation Test Generator 1 FaultEmulator 1 RAM 1 Test Generator 2 FaultEmulator 2 RAM 2 7-segment displays Test Generator 3 FaultEmulator 3 I/O Interface Global Controller RAM 3 Joystick . . . . . . . . . . . . . . . . . . . . . . . . . . . Test Generator 29 FaultEmulator 29 RAM 29 Test Generator 30 FaultEmulator 30 RAM 30

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