600 likes | 801 Views
數位邏輯. 教師: 陳炯勳 mikemouse@is.cs.nthu.edu.tw 助教:陳建銘 kkyy@is.cs.nthu.edu.tw 助教:張仕穎 godspeed@is.cs.nthu.edu.tw. AND gate VS OR gate. Figure 2.6 A truth table for AND and OR. Figure 2.7 Three-input AND and OR. NOT gate and XOR gate. x. 1. x. 2. x. 1. ×. ×. ¼. ×. x. x.
E N D
數位邏輯 教師: 陳炯勳 mikemouse@is.cs.nthu.edu.tw 助教:陳建銘 kkyy@is.cs.nthu.edu.tw 助教:張仕穎 godspeed@is.cs.nthu.edu.tw
AND gate VS OR gate Figure 2.6 A truth table for AND and OR
x 1 x 2 x 1 × × ¼ × x x x × x x 1 2 n 1 2 x 2 x n (a) AND gates x 1 x 2 x 1 ¼ x + x x + x + + x 1 2 1 2 n x 2 x n (b) OR gates x x (c) NOT gate Figure 2.8 The basic gates
x 1 x 2 ‧ x ( ) f = x + x 3 1 2 x 3 F = (x1 + x2) ‧x3 Figure 2.9 An OR-AND function
‧ (a) Network that implements f = x + x x 1 1 2 ( , ) x x f x x 1 2 1 2 0 0 1 0 1 1 1 0 0 1 1 1 (b) Truth table for f 0→0 →1→1 1→ 1→0→0 x 1 A 1→1 →0→1 f 0→1 →0→1 B 0→ 1 →0→1 x 2 Figure 2.10 a Logic network
1 x 1 0 1 x 2 0 1 A 0 1 B 0 1 f 0 Time (c) Timing diagram 0 →0 → 1 →1 1→ 1 → 0 → 0 x 1 1→1 →0→1 g 0 → 1 → 0 →1 x 2 (d) Network that implements g = x + x 1 2 Figure 2.10 b Logic network
s x1 x2 f (s, x1, x2) 0 0 0 0 0 0 1 0 x 1 0 1 0 1 0 1 1 1 f 1 0 0 0 s 1 0 1 1 x 2 1 1 0 0 1 1 1 1 (a) Truth table (b) Circuit s f (s, x1, x2) s x1 x 0 0 1 f x2 x 1 1 2 (c) Graphical symbol (d) More compact truth-table representation Figure 2.22 Multiplexer Multiplexer
交換率與分配率 • 交換率: • X + Y = Y + X X * Y = Y * X • 分配率: • (X + Y) + Z = X + (Y + Z) • (X * Y) * Z = X * (Y * Z)
DeMorgan’s Laws EX:
Minterms & Maxterms • Minterms就是SOP • F(A,B,C)=AB+BC • Maxterms就是POS • F(A,B,C)=(A+B)(B+C)
m1 m4 m5 m6 Figure 2.18 A three-variable function
M0 M2 M3 M7
x 2 f x 3 x 1 (a) A minimal sum-of-products realization x 1 x 3 f x 2 (b) A minimal product-of-sums realization Figure 2.19 Two realizations of a function
f x 1 x 2 x 3 (a) Sum-of-products realization SOP (Sum of Products) Figure 2.21SOP implementation of the three-way light controller
x 3 x 2 x 1 f (b) Product-of-sums realization POS (Product of Sums) Figure 2.21 POS implementation of the three-way light controller
x 1 x 2 f (a) Canonical sum-of-products 化簡
x 1 f x 2 (b) Minimal-cost realization Figure 2.16 Two implementations of a function X1 X2 f 0 0 1 1 0 1 0 1 1 1 0 1
011 111 010 110 001 101 000 100
K-Map • A K-map has a square for each ‘1’ or ‘0’ of a Boolean function. • One variable K-map has 21 = 2 squares. • Two variable K-map has 22 =4 squares • Three variable K-map has 23 = 8 squares • Four variable K-map has 24 = 16 squares 4 variables 1 variable 3 variables 2 variables